On 05/31/12 16:18, Nilay Vaish wrote: > On Fri, 25 May 2012, Gabe Black wrote: >> On 05/24/12 07:56, Nilay Vaish wrote: >>> Gabe, what performance improvements do you have in mind? We had >>> discussed before the possibility of the registers read/written by a >>> microop being decided at the time of construction of the microop, >>> instead of at compile time. From the discussion it seemed that we >>> would need to assess the execution time impact of such any such change >>> as it would probably affect all the ISAs. >>> >>> -- >>> Nilay >>> _______________________________________________ >>> gem5-dev mailing list >>> [email protected] >>> http://m5sim.org/mailman/listinfo/gem5-dev >> >> Just finding a way to avoid the unnecessary register reads, ie the ones >> for bits that aren't being set or read, which is what we talked about >> before. If we can simply avoid the reads without changing the way the >> CPUs work, then it shouldn't affect the other ISAs. We'll want to keep >> the changes localized to the way the StaticInsts are set up, because >> technically that's all that really needs to change. > > I am still inclined towards changing the ISA parser. I think we need a > mechanism so that unnecessary reads/writes are avoided only when the > ISA explicitly asks for it. Right now I am thinking of introducing new > functions like makeConditionalConstructor(), makeConditionalRead(), > makeConditionalWrite(), that are used only when the microop being > generated has some operand that can read/written conditionally. In > this case, all the ISAs that do not want to make use of conditional > operand read / writes will not be affected. And the StaticInst class > would also not require any changes. > > -- > Nilay > _______________________________________________ > gem5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/gem5-dev
I think I agree that this should be an optional thing which won't affect the ISAs that don't want/need to use it, and the ISA parser should be where most of the changes go. I think if we were writing the StaticInst classes by hand, we could put all the changes in there manually. Hopefully we can teach the ISA parser to do that in a reasonable way. I haven't looked back to refresh my memory on how PTLsim does things, and maybe once I do that will seem like the right way to do things. I haven't thought about that much yet. Gabe _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
