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(Updated July 5, 2012, 1:53 a.m.) Review request for Default. Description (updated) ------- Changeset 9095:d34f7edb5762 --------------------------- Bus: Split the bus into separate request/response layers This patch splits the existing buses into multiple layers. The non-coherent bus is split into a request and a response layer, and the coherent bus adds an additional layer for the snoop responses. The layer is modified to be templatised on the port type, such that the different layers can have retryLists with either master or slave ports. This patch also removes the dynamic cast from the retry, as previously promised when moving the recvRetry from the port base class to the master/slave port respectively. Overall, the split bus more closely reflects any modern on-chip bus and should be at step in the right direction. From this point, it would be reasonable straight forward to add separate layers (and thus contention points and arbitration) for each port and thus create a true crossbar. The regressions all produce the correct output, but have varying degrees of changes to their statistics. A separate patch will be pushed with the updates to the reference statistics. Diffs (updated) ----- src/mem/bus.hh 5f0321c03a26 src/mem/bus.cc 5f0321c03a26 src/mem/coherent_bus.hh 5f0321c03a26 src/mem/coherent_bus.cc 5f0321c03a26 src/mem/noncoherent_bus.hh 5f0321c03a26 src/mem/noncoherent_bus.cc 5f0321c03a26 Diff: http://reviews.gem5.org/r/1266/diff/ Testing ------- util/regress all running and producing the right output (disregarding t1000 and eio) but with essentially all timing tests exhibiting stat differences reflecting less bus contention Thanks, Andreas Hansson _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
