changeset 65423863d963 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=65423863d963
description:
Regression: Update stats due to changes to x86 cpuid instruction
diffstat:
tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini
| 8 +-
tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simerr
| 11 +
tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simout
| 15 +-
tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt
| 1708 +++++-----
tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/system.pc.com_1.terminal
| 4 +-
tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/config.ini
| 121 +-
tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/ruby.stats
| 508 +-
tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simerr
| 2 +
tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simout
| 15 +-
tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/stats.txt
| 170 +-
tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/system.pc.com_1.terminal
| 2 +-
tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini
| 14 +-
tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/simerr
| 1 +
tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout
| 13 +-
tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt
| 70 +-
tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini
| 8 +-
tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/simerr
| 1 +
tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/simout
| 13 +-
tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt
| 304 +-
19 files changed, 1538 insertions(+), 1450 deletions(-)
diffs (truncated from 4109 to 300 lines):
diff -r 3476c436d248 -r 65423863d963
tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini
--- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini Sun Jul
22 20:31:23 2012 -0500
+++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini Sun Jul
22 20:31:24 2012 -0500
@@ -15,7 +15,7 @@
init_param=0
intel_mp_pointer=system.intel_mp_pointer
intel_mp_table=system.intel_mp_table
-kernel=/dist/m5/system/binaries/x86_64-vmlinux-2.6.22.9
+kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9
load_addr_mask=18446744073709551615
mem_mode=timing
memories=system.physmem
@@ -999,7 +999,7 @@
use_default_range=false
width=8
default=system.membus.badaddr_responder.pio
-master=system.physmem.port[0] system.bridge.slave system.cpu.interrupts.pio
system.cpu.interrupts.int_slave
+master=system.physmem.port system.bridge.slave system.cpu.interrupts.pio
system.cpu.interrupts.int_slave
slave=system.apicbridge.master system.system_port system.iocache.mem_side
system.l2c.mem_side system.cpu.interrupts.int_master
[system.membus.badaddr_responder]
@@ -1261,7 +1261,7 @@
[system.pc.south_bridge.ide.disks0.image.child]
type=RawDiskImage
-image_file=/dist/m5/system/disks/linux-x86.img
+image_file=/scratch/nilay/GEM5/system/disks/linux-x86.img
read_only=true
[system.pc.south_bridge.ide.disks1]
@@ -1281,7 +1281,7 @@
[system.pc.south_bridge.ide.disks1.image.child]
type=RawDiskImage
-image_file=/dist/m5/system/disks/linux-bigswap2.img
+image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
read_only=true
[system.pc.south_bridge.int_lines0]
diff -r 3476c436d248 -r 65423863d963
tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simerr
--- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simerr Sun Jul
22 20:31:23 2012 -0500
+++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simerr Sun Jul
22 20:31:24 2012 -0500
@@ -2,7 +2,18 @@
warn: Reading current count from inactive timer.
warn: Sockets disabled, not accepting gdb connections
warn: Don't know what interrupt to clear for console.
+warn: x86 cpuid: unknown family 0xbacc
+warn: x86 cpuid: unknown family 0xbacc
+warn: x86 cpuid: unknown family 0xbacc
+warn: x86 cpuid: unknown family 0xbacc
+warn: x86 cpuid: unknown family 0xbacc
+warn: x86 cpuid: unknown family 0xbacc
+warn: x86 cpuid: unknown family 0xbacc
warn: instruction 'fxsave' unimplemented
+warn: x86 cpuid: unknown family 0x8086
+warn: x86 cpuid: unknown family 0x8086
+warn: x86 cpuid: unimplemented function 8
+warn: x86 cpuid: unimplemented function 8
warn: Tried to clear PCI interrupt 14
warn: Unknown mouse command 0xe1.
warn: instruction 'wbinvd' unimplemented
diff -r 3476c436d248 -r 65423863d963
tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simout
--- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simout Sun Jul
22 20:31:23 2012 -0500
+++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simout Sun Jul
22 20:31:24 2012 -0500
@@ -1,12 +1,15 @@
+Redirecting stdout to
build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-o3-timing/simout
+Redirecting stderr to
build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-o3-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jul 2 2012 08:58:39
-gem5 started Jul 2 2012 14:54:43
-gem5 executing on zizzer
-command line: build/X86/gem5.fast -d
build/X86/tests/fast/long/fs/10.linux-boot/x86/linux/pc-o3-timing -re
tests/run.py build/X86/tests/fast/long/fs/10.linux-boot/x86/linux/pc-o3-timing
+gem5 compiled Jul 22 2012 08:05:39
+gem5 started Jul 22 2012 08:05:57
+gem5 executing on ribera.cs.wisc.edu
+command line: build/X86/gem5.opt -d
build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-o3-timing -re
tests/run.py build/X86/tests/opt/long/fs/10.linux-boot/x86/linux/pc-o3-timing
warning: add_child('terminal'): child 'terminal' already has parent
Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /dist/m5/system/binaries/x86_64-vmlinux-2.6.22.9
+info: kernel located at:
/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9
+ 0: rtc: Real-time clock set to Sun Jan 1 00:00:00 2012
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 5173840734500 because m5_exit instruction encountered
+Exiting @ tick 5172902281500 because m5_exit instruction encountered
diff -r 3476c436d248 -r 65423863d963
tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt
--- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt Sun Jul
22 20:31:23 2012 -0500
+++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt Sun Jul
22 20:31:24 2012 -0500
@@ -1,186 +1,186 @@
---------- Begin Simulation Statistics ----------
-sim_seconds 5.173841 #
Number of seconds simulated
-sim_ticks 5173840734500 #
Number of ticks simulated
-final_tick 5173840734500 #
Number of ticks from beginning of simulation (restored from checkpoints and
never reset)
+sim_seconds 5.172902 #
Number of seconds simulated
+sim_ticks 5172902281500 #
Number of ticks simulated
+final_tick 5172902281500 #
Number of ticks from beginning of simulation (restored from checkpoints and
never reset)
sim_freq 1000000000000 #
Frequency of simulated ticks
-host_inst_rate 158571 #
Simulator instruction rate (inst/s)
-host_op_rate 312487 #
Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1923470418 #
Simulator tick rate (ticks/s)
-host_mem_usage 368528 #
Number of bytes of host memory used
-host_seconds 2689.85 #
Real time elapsed on the host
-sim_insts 426531587 #
Number of instructions simulated
-sim_ops 840543055 #
Number of ops (including micro ops) simulated
-system.physmem.bytes_read::pc.south_bridge.ide 2458496
# Number of bytes read from this memory
-system.physmem.bytes_read::cpu.dtb.walker 3200 #
Number of bytes read from this memory
-system.physmem.bytes_read::cpu.itb.walker 448 #
Number of bytes read from this memory
-system.physmem.bytes_read::cpu.inst 1064640 #
Number of bytes read from this memory
-system.physmem.bytes_read::cpu.data 10449152 #
Number of bytes read from this memory
-system.physmem.bytes_read::total 13975936 #
Number of bytes read from this memory
-system.physmem.bytes_inst_read::cpu.inst 1064640 #
Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::total 1064640 #
Number of instructions bytes read from this memory
-system.physmem.bytes_written::writebacks 9180480 #
Number of bytes written to this memory
-system.physmem.bytes_written::total 9180480 #
Number of bytes written to this memory
-system.physmem.num_reads::pc.south_bridge.ide 38414
# Number of read requests responded to by this memory
-system.physmem.num_reads::cpu.dtb.walker 50 #
Number of read requests responded to by this memory
-system.physmem.num_reads::cpu.itb.walker 7 #
Number of read requests responded to by this memory
-system.physmem.num_reads::cpu.inst 16635 #
Number of read requests responded to by this memory
-system.physmem.num_reads::cpu.data 163268 #
Number of read requests responded to by this memory
-system.physmem.num_reads::total 218374 #
Number of read requests responded to by this memory
-system.physmem.num_writes::writebacks 143445 #
Number of write requests responded to by this memory
-system.physmem.num_writes::total 143445 #
Number of write requests responded to by this memory
-system.physmem.bw_read::pc.south_bridge.ide 475178
# Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.dtb.walker 618 #
Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.itb.walker 87 #
Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.inst 205774 #
Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data 2019612 #
Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total 2701269 #
Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst 205774 #
Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total 205774 #
Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::writebacks 1774403 #
Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total 1774403 #
Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::writebacks 1774403 #
Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::pc.south_bridge.ide 475178
# Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.dtb.walker 618 #
Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.itb.walker 87 #
Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst 205774 #
Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data 2019612 #
Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total 4475672 #
Total bandwidth to/from this memory (bytes/s)
-system.l2c.replacements 107079 #
number of replacements
-system.l2c.tagsinuse 64844.194000 #
Cycle average of tags in use
-system.l2c.total_refs 3995584 #
Total number of references to valid blocks.
-system.l2c.sampled_refs 171337 #
Sample count of references to valid blocks.
-system.l2c.avg_refs 23.320030 #
Average number of references to valid blocks.
+host_inst_rate 117061 #
Simulator instruction rate (inst/s)
+host_op_rate 230687 #
Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1419746087 #
Simulator tick rate (ticks/s)
+host_mem_usage 420308 #
Number of bytes of host memory used
+host_seconds 3643.54 #
Real time elapsed on the host
+sim_insts 426515724 #
Number of instructions simulated
+sim_ops 840516219 #
Number of ops (including micro ops) simulated
+system.physmem.bytes_read::pc.south_bridge.ide 2496512
# Number of bytes read from this memory
+system.physmem.bytes_read::cpu.dtb.walker 3520 #
Number of bytes read from this memory
+system.physmem.bytes_read::cpu.itb.walker 384 #
Number of bytes read from this memory
+system.physmem.bytes_read::cpu.inst 1067840 #
Number of bytes read from this memory
+system.physmem.bytes_read::cpu.data 10426304 #
Number of bytes read from this memory
+system.physmem.bytes_read::total 13994560 #
Number of bytes read from this memory
+system.physmem.bytes_inst_read::cpu.inst 1067840 #
Number of instructions bytes read from this memory
+system.physmem.bytes_inst_read::total 1067840 #
Number of instructions bytes read from this memory
+system.physmem.bytes_written::writebacks 9194240 #
Number of bytes written to this memory
+system.physmem.bytes_written::total 9194240 #
Number of bytes written to this memory
+system.physmem.num_reads::pc.south_bridge.ide 39008
# Number of read requests responded to by this memory
+system.physmem.num_reads::cpu.dtb.walker 55 #
Number of read requests responded to by this memory
+system.physmem.num_reads::cpu.itb.walker 6 #
Number of read requests responded to by this memory
+system.physmem.num_reads::cpu.inst 16685 #
Number of read requests responded to by this memory
+system.physmem.num_reads::cpu.data 162911 #
Number of read requests responded to by this memory
+system.physmem.num_reads::total 218665 #
Number of read requests responded to by this memory
+system.physmem.num_writes::writebacks 143660 #
Number of write requests responded to by this memory
+system.physmem.num_writes::total 143660 #
Number of write requests responded to by this memory
+system.physmem.bw_read::pc.south_bridge.ide 482613
# Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.dtb.walker 680 #
Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.itb.walker 74 #
Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.inst 206430 #
Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.data 2015562 #
Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::total 2705359 #
Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu.inst 206430 #
Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total 206430 #
Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write::writebacks 1777385 #
Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::total 1777385 #
Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total::writebacks 1777385 #
Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::pc.south_bridge.ide 482613
# Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.dtb.walker 680 #
Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.itb.walker 74 #
Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.inst 206430 #
Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.data 2015562 #
Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::total 4482745 #
Total bandwidth to/from this memory (bytes/s)
+system.l2c.replacements 107419 #
number of replacements
+system.l2c.tagsinuse 64844.084797 #
Cycle average of tags in use
+system.l2c.total_refs 3992672 #
Total number of references to valid blocks.
+system.l2c.sampled_refs 171622 #
Sample count of references to valid blocks.
+system.l2c.avg_refs 23.264337 #
Average number of references to valid blocks.
system.l2c.warmup_cycle 0 #
Cycle when the warmup percentage was hit.
-system.l2c.occ_blocks::writebacks 50153.806815 #
Average occupied blocks per requestor
-system.l2c.occ_blocks::cpu.dtb.walker 12.883885 #
Average occupied blocks per requestor
-system.l2c.occ_blocks::cpu.itb.walker 0.168545 #
Average occupied blocks per requestor
-system.l2c.occ_blocks::cpu.inst 3383.279361 #
Average occupied blocks per requestor
-system.l2c.occ_blocks::cpu.data 11294.055394 #
Average occupied blocks per requestor
-system.l2c.occ_percent::writebacks 0.765286 #
Average percentage of cache occupancy
+system.l2c.occ_blocks::writebacks 50135.967843 #
Average occupied blocks per requestor
+system.l2c.occ_blocks::cpu.dtb.walker 12.897301 #
Average occupied blocks per requestor
+system.l2c.occ_blocks::cpu.itb.walker 0.156788 #
Average occupied blocks per requestor
+system.l2c.occ_blocks::cpu.inst 3372.666022 #
Average occupied blocks per requestor
+system.l2c.occ_blocks::cpu.data 11322.396844 #
Average occupied blocks per requestor
+system.l2c.occ_percent::writebacks 0.765014 #
Average percentage of cache occupancy
system.l2c.occ_percent::cpu.dtb.walker 0.000197 #
Average percentage of cache occupancy
-system.l2c.occ_percent::cpu.itb.walker 0.000003 #
Average percentage of cache occupancy
-system.l2c.occ_percent::cpu.inst 0.051625 #
Average percentage of cache occupancy
-system.l2c.occ_percent::cpu.data 0.172334 #
Average percentage of cache occupancy
-system.l2c.occ_percent::total 0.989444 #
Average percentage of cache occupancy
-system.l2c.ReadReq_hits::cpu.dtb.walker 110015 #
number of ReadReq hits
-system.l2c.ReadReq_hits::cpu.itb.walker 8879 #
number of ReadReq hits
-system.l2c.ReadReq_hits::cpu.inst 1055721 #
number of ReadReq hits
-system.l2c.ReadReq_hits::cpu.data 1346083 #
number of ReadReq hits
-system.l2c.ReadReq_hits::total 2520698 #
number of ReadReq hits
-system.l2c.Writeback_hits::writebacks 1613450 #
number of Writeback hits
-system.l2c.Writeback_hits::total 1613450 #
number of Writeback hits
-system.l2c.UpgradeReq_hits::cpu.data 329 #
number of UpgradeReq hits
-system.l2c.UpgradeReq_hits::total 329 #
number of UpgradeReq hits
-system.l2c.ReadExReq_hits::cpu.data 163813 #
number of ReadExReq hits
-system.l2c.ReadExReq_hits::total 163813 #
number of ReadExReq hits
-system.l2c.demand_hits::cpu.dtb.walker 110015 #
number of demand (read+write) hits
-system.l2c.demand_hits::cpu.itb.walker 8879 #
number of demand (read+write) hits
-system.l2c.demand_hits::cpu.inst 1055721 #
number of demand (read+write) hits
-system.l2c.demand_hits::cpu.data 1509896 #
number of demand (read+write) hits
-system.l2c.demand_hits::total 2684511 #
number of demand (read+write) hits
-system.l2c.overall_hits::cpu.dtb.walker 110015 #
number of overall hits
-system.l2c.overall_hits::cpu.itb.walker 8879 #
number of overall hits
-system.l2c.overall_hits::cpu.inst 1055721 #
number of overall hits
-system.l2c.overall_hits::cpu.data 1509896 #
number of overall hits
-system.l2c.overall_hits::total 2684511 #
number of overall hits
-system.l2c.ReadReq_misses::cpu.dtb.walker 50 #
number of ReadReq misses
-system.l2c.ReadReq_misses::cpu.itb.walker 7 #
number of ReadReq misses
-system.l2c.ReadReq_misses::cpu.inst 16637 #
number of ReadReq misses
-system.l2c.ReadReq_misses::cpu.data 34998 #
number of ReadReq misses
-system.l2c.ReadReq_misses::total 51692 #
number of ReadReq misses
-system.l2c.UpgradeReq_misses::cpu.data 1514 #
number of UpgradeReq misses
-system.l2c.UpgradeReq_misses::total 1514 #
number of UpgradeReq misses
-system.l2c.ReadExReq_misses::cpu.data 129215 #
number of ReadExReq misses
-system.l2c.ReadExReq_misses::total 129215 #
number of ReadExReq misses
-system.l2c.demand_misses::cpu.dtb.walker 50 #
number of demand (read+write) misses
-system.l2c.demand_misses::cpu.itb.walker 7 #
number of demand (read+write) misses
-system.l2c.demand_misses::cpu.inst 16637 #
number of demand (read+write) misses
-system.l2c.demand_misses::cpu.data 164213 #
number of demand (read+write) misses
-system.l2c.demand_misses::total 180907 #
number of demand (read+write) misses
-system.l2c.overall_misses::cpu.dtb.walker 50 #
number of overall misses
-system.l2c.overall_misses::cpu.itb.walker 7 #
number of overall misses
-system.l2c.overall_misses::cpu.inst 16637 #
number of overall misses
-system.l2c.overall_misses::cpu.data 164213 #
number of overall misses
-system.l2c.overall_misses::total 180907 #
number of overall misses
-system.l2c.ReadReq_miss_latency::cpu.dtb.walker 2626500
# number of ReadReq miss cycles
-system.l2c.ReadReq_miss_latency::cpu.itb.walker 364000
# number of ReadReq miss cycles
-system.l2c.ReadReq_miss_latency::cpu.inst 883116000 #
number of ReadReq miss cycles
-system.l2c.ReadReq_miss_latency::cpu.data 1863608490 #
number of ReadReq miss cycles
-system.l2c.ReadReq_miss_latency::total 2749714990 #
number of ReadReq miss cycles
-system.l2c.UpgradeReq_miss_latency::cpu.data 39367500
# number of UpgradeReq miss cycles
-system.l2c.UpgradeReq_miss_latency::total 39367500 #
number of UpgradeReq miss cycles
-system.l2c.ReadExReq_miss_latency::cpu.data 6737631498
# number of ReadExReq miss cycles
-system.l2c.ReadExReq_miss_latency::total 6737631498 #
number of ReadExReq miss cycles
-system.l2c.demand_miss_latency::cpu.dtb.walker 2626500
# number of demand (read+write) miss cycles
-system.l2c.demand_miss_latency::cpu.itb.walker 364000
# number of demand (read+write) miss cycles
-system.l2c.demand_miss_latency::cpu.inst 883116000 #
number of demand (read+write) miss cycles
-system.l2c.demand_miss_latency::cpu.data 8601239988 #
number of demand (read+write) miss cycles
-system.l2c.demand_miss_latency::total 9487346488 #
number of demand (read+write) miss cycles
-system.l2c.overall_miss_latency::cpu.dtb.walker 2626500
# number of overall miss cycles
-system.l2c.overall_miss_latency::cpu.itb.walker 364000
# number of overall miss cycles
-system.l2c.overall_miss_latency::cpu.inst 883116000 #
number of overall miss cycles
-system.l2c.overall_miss_latency::cpu.data 8601239988 #
number of overall miss cycles
-system.l2c.overall_miss_latency::total 9487346488 #
number of overall miss cycles
-system.l2c.ReadReq_accesses::cpu.dtb.walker 110065
# number of ReadReq accesses(hits+misses)
-system.l2c.ReadReq_accesses::cpu.itb.walker 8886
# number of ReadReq accesses(hits+misses)
-system.l2c.ReadReq_accesses::cpu.inst 1072358 #
number of ReadReq accesses(hits+misses)
-system.l2c.ReadReq_accesses::cpu.data 1381081 #
number of ReadReq accesses(hits+misses)
-system.l2c.ReadReq_accesses::total 2572390 #
number of ReadReq accesses(hits+misses)
-system.l2c.Writeback_accesses::writebacks 1613450 #
number of Writeback accesses(hits+misses)
-system.l2c.Writeback_accesses::total 1613450 #
number of Writeback accesses(hits+misses)
-system.l2c.UpgradeReq_accesses::cpu.data 1843 #
number of UpgradeReq accesses(hits+misses)
-system.l2c.UpgradeReq_accesses::total 1843 #
number of UpgradeReq accesses(hits+misses)
-system.l2c.ReadExReq_accesses::cpu.data 293028 #
number of ReadExReq accesses(hits+misses)
-system.l2c.ReadExReq_accesses::total 293028 #
number of ReadExReq accesses(hits+misses)
-system.l2c.demand_accesses::cpu.dtb.walker 110065
# number of demand (read+write) accesses
-system.l2c.demand_accesses::cpu.itb.walker 8886
# number of demand (read+write) accesses
-system.l2c.demand_accesses::cpu.inst 1072358 #
number of demand (read+write) accesses
-system.l2c.demand_accesses::cpu.data 1674109 #
number of demand (read+write) accesses
-system.l2c.demand_accesses::total 2865418 #
number of demand (read+write) accesses
-system.l2c.overall_accesses::cpu.dtb.walker 110065
# number of overall (read+write) accesses
-system.l2c.overall_accesses::cpu.itb.walker 8886
# number of overall (read+write) accesses
-system.l2c.overall_accesses::cpu.inst 1072358 #
number of overall (read+write) accesses
-system.l2c.overall_accesses::cpu.data 1674109 #
number of overall (read+write) accesses
-system.l2c.overall_accesses::total 2865418 #
number of overall (read+write) accesses
-system.l2c.ReadReq_miss_rate::cpu.dtb.walker 0.000454
# miss rate for ReadReq accesses
-system.l2c.ReadReq_miss_rate::cpu.itb.walker 0.000788
# miss rate for ReadReq accesses
-system.l2c.ReadReq_miss_rate::cpu.inst 0.015514 #
miss rate for ReadReq accesses
-system.l2c.ReadReq_miss_rate::cpu.data 0.025341 #
miss rate for ReadReq accesses
-system.l2c.ReadReq_miss_rate::total 0.020095 #
miss rate for ReadReq accesses
-system.l2c.UpgradeReq_miss_rate::cpu.data 0.821487 #
miss rate for UpgradeReq accesses
-system.l2c.UpgradeReq_miss_rate::total 0.821487 #
miss rate for UpgradeReq accesses
-system.l2c.ReadExReq_miss_rate::cpu.data 0.440965 #
miss rate for ReadExReq accesses
-system.l2c.ReadExReq_miss_rate::total 0.440965 #
miss rate for ReadExReq accesses
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