On Mon, 27 Aug 2012, Steve Reinhardt wrote:

-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.gem5.org/r/1322/#review3343
-----------------------------------------------------------


Hi Nilay,

I'm a little confused by how this works. Looking at the templates in src/arch/x86/isa/microops/regop.isa, it looks like flag_code gets executed in the execute() method, which seems to me like it would be too late to determine what the instruction's register dependencies are. Can you enlighten me a bit on how this works?


The patch introduces predicates for condition code registers. These predicates are evaluated twice -- during construction of the microop and during its execution.

It is true that flag_code executes only during the execution of the microop. But the isa parser gleans all the registers being used and adds them to the constructor of the microop. Since the predicates are being evaluated during construction as well, only those registers that are actually required would be added to the source and destination lists of the microop.

--
Nilay
_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev

Reply via email to