> On Sept. 10, 2012, 1:57 a.m., Andreas Hansson wrote: > > src/arch/arm/table_walker.cc, line 202 > > <http://reviews.gem5.org/r/1402/diff/1/?file=29548#file29548line202> > > > > Is this to remember the current tc for the walk after squashing?
yea.. we need it to kick off another walk. > On Sept. 10, 2012, 1:57 a.m., Andreas Hansson wrote: > > src/arch/arm/table_walker.cc, line 203 > > <http://reviews.gem5.org/r/1402/diff/1/?file=29548#file29548line203> > > > > Is not really needed as this is the "else" block, but I'm happy to keep > > it here. intentionally put there since the "else" is created by a return instruction. defensive programing and all. > On Sept. 10, 2012, 1:57 a.m., Andreas Hansson wrote: > > src/sim/tlb.hh, line 103 > > <http://reviews.gem5.org/r/1402/diff/1/?file=29551#file29551line103> > > > > const? > > > > Who ever returns true? > > > > isSquashed to be consistent in the naming? The version that is already implemented in the out of order and in-order cpu exec contextes. I'd prefer to make it clear that there is a different version and not stick with the isXXXXX naming from the XC. - Ali ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1402/#review3410 ----------------------------------------------------------- On Sept. 7, 2012, 12:52 p.m., Ali Saidi wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1402/ > ----------------------------------------------------------- > > (Updated Sept. 7, 2012, 12:52 p.m.) > > > Review request for Default. > > > Description > ------- > > Changeset 9206:434a3ad49be9 > --------------------------- > ARM: Squash outstanding walks when instructions are squashed. > > > Diffs > ----- > > src/arch/arm/ArmTLB.py 87967784f101 > src/arch/arm/table_walker.hh 87967784f101 > src/arch/arm/table_walker.cc 87967784f101 > src/cpu/simple/timing.hh 87967784f101 > src/cpu/translation.hh 87967784f101 > src/sim/tlb.hh 87967784f101 > > Diff: http://reviews.gem5.org/r/1402/diff/ > > > Testing > ------- > > > Thanks, > > Ali Saidi > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
