changeset 029dfe6324d3 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=029dfe6324d3
description:
cpu: Unify SimpleCPU and O3 CPU serialization code
The O3 CPU used to copy its thread context to a SimpleThread in order
to do serialization. This was a bit of a hack involving two static
SimpleThread instances and a magic constructor that was only used by
the O3 CPU.
This patch moves the ThreadContext serialization code into two global
procedures that, in addition to the normal serialization parameters,
take a ThreadContext reference as a parameter. This allows us to reuse
the serialization code in all ThreadContext implementations.
diffstat:
src/cpu/inorder/thread_context.cc | 15 ----------
src/cpu/inorder/thread_context.hh | 6 ----
src/cpu/o3/cpu.cc | 26 ++++------------
src/cpu/o3/thread_context.hh | 5 ---
src/cpu/o3/thread_context_impl.hh | 16 ----------
src/cpu/o3/thread_state.hh | 33 ++++++++++++++++++++++
src/cpu/simple_thread.cc | 16 +---------
src/cpu/simple_thread.hh | 2 -
src/cpu/thread_context.cc | 58 +++++++++++++++++++++++++++++++++++++++
src/cpu/thread_context.hh | 24 ++++++++++-----
10 files changed, 116 insertions(+), 85 deletions(-)
diffs (truncated from 347 to 300 lines):
diff -r ddf45c1d54d4 -r 029dfe6324d3 src/cpu/inorder/thread_context.cc
--- a/src/cpu/inorder/thread_context.cc Mon Jan 07 13:05:44 2013 -0500
+++ b/src/cpu/inorder/thread_context.cc Mon Jan 07 13:05:44 2013 -0500
@@ -160,21 +160,6 @@
}
}
-
-void
-InOrderThreadContext::serialize(std::ostream &os)
-{
- panic("serialize unimplemented");
-}
-
-
-void
-InOrderThreadContext::unserialize(Checkpoint *cp, const std::string §ion)
-{
- panic("unserialize unimplemented");
-}
-
-
void
InOrderThreadContext::copyArchRegs(ThreadContext *src_tc)
{
diff -r ddf45c1d54d4 -r 029dfe6324d3 src/cpu/inorder/thread_context.hh
--- a/src/cpu/inorder/thread_context.hh Mon Jan 07 13:05:44 2013 -0500
+++ b/src/cpu/inorder/thread_context.hh Mon Jan 07 13:05:44 2013 -0500
@@ -191,12 +191,6 @@
/** Registers statistics associated with this TC. */
void regStats(const std::string &name);
- /** Serializes state. */
- void serialize(std::ostream &os);
-
- /** Unserializes state. */
- void unserialize(Checkpoint *cp, const std::string §ion);
-
/** Returns this thread's ID number. */
int getThreadNum() { return thread->threadId(); }
diff -r ddf45c1d54d4 -r 029dfe6324d3 src/cpu/o3/cpu.cc
--- a/src/cpu/o3/cpu.cc Mon Jan 07 13:05:44 2013 -0500
+++ b/src/cpu/o3/cpu.cc Mon Jan 07 13:05:44 2013 -0500
@@ -1097,16 +1097,9 @@
nameOut(os, csprintf("%s.tickEvent", name()));
tickEvent.serialize(os);
- // Use SimpleThread's ability to checkpoint to make it easier to
- // write out the registers. Also make this static so it doesn't
- // get instantiated multiple times (causes a panic in statistics).
- static SimpleThread temp;
-
- ThreadID size = thread.size();
- for (ThreadID i = 0; i < size; i++) {
+ for (ThreadID i = 0; i < thread.size(); i++) {
nameOut(os, csprintf("%s.xc.%i", name(), i));
- temp.copyTC(thread[i]->getTC());
- temp.serialize(os);
+ thread[i]->serialize(os);
}
}
@@ -1119,16 +1112,11 @@
BaseCPU::unserialize(cp, section);
tickEvent.unserialize(cp, csprintf("%s.tickEvent", section));
- // Use SimpleThread's ability to checkpoint to make it easier to
- // read in the registers. Also make this static so it doesn't
- // get instantiated multiple times (causes a panic in statistics).
- static SimpleThread temp;
-
- ThreadID size = thread.size();
- for (ThreadID i = 0; i < size; i++) {
- temp.copyTC(thread[i]->getTC());
- temp.unserialize(cp, csprintf("%s.xc.%i", section, i));
- thread[i]->getTC()->copyArchRegs(temp.getTC());
+ for (ThreadID i = 0; i < thread.size(); i++) {
+ thread[i]->unserialize(cp,
+ csprintf("%s.xc.%i", section, i));
+ if (thread[i]->status() == ThreadContext::Active)
+ activateThread(i);
}
}
diff -r ddf45c1d54d4 -r 029dfe6324d3 src/cpu/o3/thread_context.hh
--- a/src/cpu/o3/thread_context.hh Mon Jan 07 13:05:44 2013 -0500
+++ b/src/cpu/o3/thread_context.hh Mon Jan 07 13:05:44 2013 -0500
@@ -153,11 +153,6 @@
/** Registers statistics associated with this TC. */
virtual void regStats(const std::string &name);
- /** Serializes state. */
- virtual void serialize(std::ostream &os);
- /** Unserializes state. */
- virtual void unserialize(Checkpoint *cp, const std::string §ion);
-
/** Reads the last tick that this thread was activated on. */
virtual Tick readLastActivate();
/** Reads the last tick that this thread was suspended on. */
diff -r ddf45c1d54d4 -r 029dfe6324d3 src/cpu/o3/thread_context_impl.hh
--- a/src/cpu/o3/thread_context_impl.hh Mon Jan 07 13:05:44 2013 -0500
+++ b/src/cpu/o3/thread_context_impl.hh Mon Jan 07 13:05:44 2013 -0500
@@ -159,22 +159,6 @@
}
template <class Impl>
-void
-O3ThreadContext<Impl>::serialize(std::ostream &os)
-{
- if (FullSystem && thread->kernelStats)
- thread->kernelStats->serialize(os);
-}
-
-template <class Impl>
-void
-O3ThreadContext<Impl>::unserialize(Checkpoint *cp, const std::string §ion)
-{
- if (FullSystem && thread->kernelStats)
- thread->kernelStats->unserialize(cp, section);
-}
-
-template <class Impl>
Tick
O3ThreadContext<Impl>::readLastActivate()
{
diff -r ddf45c1d54d4 -r 029dfe6324d3 src/cpu/o3/thread_state.hh
--- a/src/cpu/o3/thread_state.hh Mon Jan 07 13:05:44 2013 -0500
+++ b/src/cpu/o3/thread_state.hh Mon Jan 07 13:05:44 2013 -0500
@@ -1,4 +1,16 @@
/*
+ * Copyright (c) 2012 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
* Copyright (c) 2006 The Regents of The University of Michigan
* All rights reserved.
*
@@ -99,6 +111,27 @@
profilePC = 3;
}
+ void serialize(std::ostream &os)
+ {
+ ThreadState::serialize(os);
+ // Use the ThreadContext serialization helper to serialize the
+ // TC.
+ ::serialize(*tc, os);
+ }
+
+ void unserialize(Checkpoint *cp, const std::string §ion)
+ {
+ // Prevent squashing - we don't have any instructions in
+ // flight that we need to squash since we just instantiated a
+ // clean system.
+ noSquashFromTC = true;
+ ThreadState::unserialize(cp, section);
+ // Use the ThreadContext serialization helper to unserialize
+ // the TC.
+ ::unserialize(*tc, cp, section);
+ noSquashFromTC = false;
+ }
+
/** Pointer to the ThreadContext of this thread. */
ThreadContext *tc;
diff -r ddf45c1d54d4 -r 029dfe6324d3 src/cpu/simple_thread.cc
--- a/src/cpu/simple_thread.cc Mon Jan 07 13:05:44 2013 -0500
+++ b/src/cpu/simple_thread.cc Mon Jan 07 13:05:44 2013 -0500
@@ -99,12 +99,6 @@
kernelStats = new TheISA::Kernel::Statistics(system);
}
-SimpleThread::SimpleThread()
- : ThreadState(NULL, -1, NULL), isa(NULL)
-{
- tc = new ProxyThreadContext<SimpleThread>(this);
-}
-
SimpleThread::~SimpleThread()
{
delete tc;
@@ -175,10 +169,7 @@
SimpleThread::serialize(ostream &os)
{
ThreadState::serialize(os);
- SERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs);
- SERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs);
- _pcState.serialize(os);
- // thread_num and cpu_id are deterministic from the config
+ ::serialize(*tc, os);
}
@@ -186,10 +177,7 @@
SimpleThread::unserialize(Checkpoint *cp, const std::string §ion)
{
ThreadState::unserialize(cp, section);
- UNSERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs);
- UNSERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs);
- _pcState.unserialize(cp, section);
- // thread_num and cpu_id are deterministic from the config
+ ::unserialize(*tc, cp, section);
}
void
diff -r ddf45c1d54d4 -r 029dfe6324d3 src/cpu/simple_thread.hh
--- a/src/cpu/simple_thread.hh Mon Jan 07 13:05:44 2013 -0500
+++ b/src/cpu/simple_thread.hh Mon Jan 07 13:05:44 2013 -0500
@@ -140,8 +140,6 @@
Process *_process, TheISA::TLB *_itb, TheISA::TLB *_dtb,
TheISA::ISA *_isa);
- SimpleThread();
-
virtual ~SimpleThread();
virtual void takeOverFrom(ThreadContext *oldContext);
diff -r ddf45c1d54d4 -r 029dfe6324d3 src/cpu/thread_context.cc
--- a/src/cpu/thread_context.cc Mon Jan 07 13:05:44 2013 -0500
+++ b/src/cpu/thread_context.cc Mon Jan 07 13:05:44 2013 -0500
@@ -1,4 +1,16 @@
/*
+ * Copyright (c) 2012 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
* Copyright (c) 2006 The Regents of The University of Michigan
* All rights reserved.
*
@@ -78,3 +90,49 @@
}
+
+void
+serialize(ThreadContext &tc, std::ostream &os)
+{
+ using namespace TheISA;
+
+ FloatRegBits floatRegs[NumFloatRegs];
+ for (int i = 0; i < NumFloatRegs; ++i)
+ floatRegs[i] = tc.readFloatRegBitsFlat(i);
+ // This is a bit ugly, but needed to maintain backwards
+ // compatibility.
+ arrayParamOut(os, "floatRegs.i", floatRegs, NumFloatRegs);
+
+ IntReg intRegs[NumIntRegs];
+ for (int i = 0; i < NumIntRegs; ++i)
+ intRegs[i] = tc.readIntRegFlat(i);
+ SERIALIZE_ARRAY(intRegs, NumIntRegs);
+
+ tc.pcState().serialize(os);
+
+ // thread_num and cpu_id are deterministic from the config
+}
+
+void
+unserialize(ThreadContext &tc, Checkpoint *cp, const std::string §ion)
+{
+ using namespace TheISA;
+
+ FloatRegBits floatRegs[NumFloatRegs];
+ // This is a bit ugly, but needed to maintain backwards
+ // compatibility.
+ arrayParamIn(cp, section, "floatRegs.i", floatRegs, NumFloatRegs);
+ for (int i = 0; i < NumFloatRegs; ++i)
+ tc.setFloatRegBitsFlat(i, floatRegs[i]);
+
+ IntReg intRegs[NumIntRegs];
+ UNSERIALIZE_ARRAY(intRegs, NumIntRegs);
+ for (int i = 0; i < NumIntRegs; ++i)
+ tc.setIntRegFlat(i, intRegs[i]);
+
+ PCState pcState;
+ pcState.unserialize(cp, section);
+ tc.pcState(pcState);
+
+ // thread_num and cpu_id are deterministic from the config
+}
diff -r ddf45c1d54d4 -r 029dfe6324d3 src/cpu/thread_context.hh
--- a/src/cpu/thread_context.hh Mon Jan 07 13:05:44 2013 -0500
+++ b/src/cpu/thread_context.hh Mon Jan 07 13:05:44 2013 -0500
@@ -1,5 +1,5 @@
_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev