On Thu, Aug 1, 2013 at 11:08 AM, Nilay Vaish <[email protected]> wrote:
> > I initially thought you mean that we use different offsets in different > parts of the code. But now it seems that you do not like the fact that in > some ISAs FP_Base_DepTag == NumIntRegs and in some it is not true. Looking > at the code for flattening register indices in src/arch/*/isa.hh, it seems > that it is because of peculiarities of arm, sparc and x86 ISAs. I am > guessing we have to live with it. > Your initial understanding was correct, we are using different offsets in different parts of the code, and that is what is bothering me. For example, for FP regs, sometimes we use FP_Base_DepTag as an offset and sometimes we use NumIntRegs. I think the use of these two different offsets is particularly confusing because, for most ISAs, FP_Base_DepTag does equal NumIntRegs... thus it's hard to understand the need for two different offsets when they often (but not always) have the same value. In addition, there is no documentation explaining why these sometimes (but not usually) have different values. However, I don't particularly have a problem with them being different as long as there's a good reason for it. BTW, do you know what the IntFoldBit in x86 does? I'm beginning to see that this bit actually plays a significant role in why x86 register indexing is different from other ISAs. In particular, it appears that the IntFoldBit means that the "unflattened" integer register space for x86 is actually larger than the "flattened' register space, which is both counterintuitive and opposite from all other ISAs. Steve _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
