changeset e4b12145f4eb in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=e4b12145f4eb
description:
ruby: slicc: move some code to AbstractController
Some of the code in StateMachine.py file is added to all the
controllers and
is independent of the controller definition. This code is being moved
to the
AbstractController class which is the parent class of all controllers.
diffstat:
src/mem/ruby/slicc_interface/AbstractController.cc | 16 ++++++++++
src/mem/ruby/slicc_interface/AbstractController.hh | 13 +++++---
src/mem/slicc/symbols/StateMachine.py | 33 ----------------------
3 files changed, 24 insertions(+), 38 deletions(-)
diffs (113 lines):
diff -r ebd7d3e04b5f -r e4b12145f4eb
src/mem/ruby/slicc_interface/AbstractController.cc
--- a/src/mem/ruby/slicc_interface/AbstractController.cc Wed Aug 07
14:51:17 2013 -0500
+++ b/src/mem/ruby/slicc_interface/AbstractController.cc Wed Aug 07
14:51:18 2013 -0500
@@ -182,3 +182,19 @@
m_waiting_buffers.clear();
}
}
+
+void
+AbstractController::blockOnQueue(Address addr, MessageBuffer* port)
+{
+ m_is_blocking = true;
+ m_block_map[addr] = port;
+}
+
+void
+AbstractController::unblock(Address addr)
+{
+ m_block_map.erase(addr);
+ if (m_block_map.size() == 0) {
+ m_is_blocking = false;
+ }
+}
diff -r ebd7d3e04b5f -r e4b12145f4eb
src/mem/ruby/slicc_interface/AbstractController.hh
--- a/src/mem/ruby/slicc_interface/AbstractController.hh Wed Aug 07
14:51:17 2013 -0500
+++ b/src/mem/ruby/slicc_interface/AbstractController.hh Wed Aug 07
14:51:18 2013 -0500
@@ -56,14 +56,17 @@
void init();
const Params *params() const { return (const Params *)_params; }
+ const int & getVersion() const { return m_version; }
+ void initNetworkPtr(Network* net_ptr) { m_net_ptr = net_ptr; }
+
+ // return instance name
+ const std::string getName() const { return m_name; }
+ void blockOnQueue(Address, MessageBuffer*);
+ void unblock(Address);
+
virtual MessageBuffer* getMandatoryQueue() const = 0;
- virtual const int & getVersion() const = 0;
virtual const std::string toString() const = 0; // returns text version of
// controller type
- virtual const std::string getName() const = 0; // return instance name
- virtual void blockOnQueue(Address, MessageBuffer*) = 0;
- virtual void unblock(Address) = 0;
- virtual void initNetworkPtr(Network* net_ptr) = 0;
virtual AccessPermission getAccessPermission(const Address& addr) = 0;
virtual DataBlock& getDataBlock(const Address& addr) = 0;
diff -r ebd7d3e04b5f -r e4b12145f4eb src/mem/slicc/symbols/StateMachine.py
--- a/src/mem/slicc/symbols/StateMachine.py Wed Aug 07 14:51:17 2013 -0500
+++ b/src/mem/slicc/symbols/StateMachine.py Wed Aug 07 14:51:18 2013 -0500
@@ -253,10 +253,7 @@
static int getNumControllers();
void init();
MessageBuffer* getMandatoryQueue() const;
- const int & getVersion() const;
const std::string toString() const;
- const std::string getName() const;
- void initNetworkPtr(Network* net_ptr) { m_net_ptr = net_ptr; }
void print(std::ostream& out) const;
void wakeup();
@@ -265,8 +262,6 @@
void regStats();
void collateStats();
- void blockOnQueue(Address addr, MessageBuffer* port);
- void unblock(Address addr);
void recordCacheTrace(int cntrl, CacheRecorder* tr);
Sequencer* getSequencer() const;
@@ -840,40 +835,12 @@
return $seq_ident;
}
-const int &
-$c_ident::getVersion() const
-{
- return m_version;
-}
-
const string
$c_ident::toString() const
{
return "$c_ident";
}
-const string
-$c_ident::getName() const
-{
- return m_name;
-}
-
-void
-$c_ident::blockOnQueue(Address addr, MessageBuffer* port)
-{
- m_is_blocking = true;
- m_block_map[addr] = port;
-}
-
-void
-$c_ident::unblock(Address addr)
-{
- m_block_map.erase(addr);
- if (m_block_map.size() == 0) {
- m_is_blocking = false;
- }
-}
-
void
$c_ident::print(ostream& out) const
{
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