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Review request for Default. Repository: gem5 Description ------- Changeset 9905:2f0374a09fc5 --------------------------- arch: Use ASI 0xFF instead of bit 63 to for generic IPRs Using address bit 63 to identify generic IPRs caused problems on SPARC, where IPRs are heavily used. This changeset redefines how generic IPRs are identified. Instead of using bit 63, we now use the ASI field in a request. We reserve ASI 0xFF for internal gem5 use. ASI 0xFF is implementation defined on SPARC, which means that we can safely use it for generic IPRs. No other architecture is currently using the ASI field. Diffs ----- src/arch/generic/mmapped_ipr.hh e672a39fd426 src/arch/sparc/asi.hh e672a39fd426 src/arch/x86/tlb.cc e672a39fd426 Diff: http://reviews.gem5.org/r/2032/diff/ Testing ------- m5ops using the IPR interface works on x86 in kvm. ARM, SPARC, and x86 targets compile. Can't run the affected (80.solaris-boot) test case due to missing binaries. Thanks, Andreas Sandberg _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
