changeset cc9dc514036e in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=cc9dc514036e
description:
        util: Streamline .apc project convertsion script

        This Python script generates an ARM DS-5 Streamline .apc project based
        on gem5 run. To successfully convert, the gem5 runs needs to be run
        with the context-switch-based stats dump option enabled (The guest
        kernel also needs to be patched to allow gem5 interrogate its task
        information.) See help for more information.

diffstat:

 configs/common/Options.py              |     4 +
 configs/example/fs.py                  |     2 +
 util/streamline/atomic_stat_config.ini |    93 ++
 util/streamline/m5stats2streamline.py  |  1232 ++++++++++++++++++++++++++++++++
 util/streamline/o3_stat_config.ini     |   119 +++
 5 files changed, 1450 insertions(+), 0 deletions(-)

diffs (truncated from 1482 to 300 lines):

diff -r b105ac205021 -r cc9dc514036e configs/common/Options.py
--- a/configs/common/Options.py Thu Oct 17 10:20:45 2013 -0500
+++ b/configs/common/Options.py Thu Oct 17 10:20:45 2013 -0500
@@ -232,6 +232,10 @@
         parser.add_option("--dtb-filename", action="store", type="string",
               help="Specifies device tree blob file to use with device-tree-"\
               "enabled kernels")
+        parser.add_option("--enable-context-switch-stats-dump", \
+                action="store_true", help="Enable stats dump at context "\
+                "switches and dump tasks file (required for Streamline)")
+
     # Benchmark options
     parser.add_option("--dual", action="store_true",
                       help="Simulate two systems attached with an ethernet 
link")
diff -r b105ac205021 -r cc9dc514036e configs/example/fs.py
--- a/configs/example/fs.py     Thu Oct 17 10:20:45 2013 -0500
+++ b/configs/example/fs.py     Thu Oct 17 10:20:45 2013 -0500
@@ -114,6 +114,8 @@
     test_sys = makeArmSystem(test_mem_mode, options.machine_type, bm[0],
                              options.dtb_filename,
                              bare_metal=options.bare_metal)
+    if options.enable_context_switch_stats_dump:
+        test_sys.enable_context_switch_stats_dump = True
 else:
     fatal("Incapable of building %s full system!", buildEnv['TARGET_ISA'])
 
diff -r b105ac205021 -r cc9dc514036e util/streamline/atomic_stat_config.ini
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/util/streamline/atomic_stat_config.ini    Thu Oct 17 10:20:45 2013 -0500
@@ -0,0 +1,93 @@
+# Copyright (c) 2012 ARM Limited
+# All rights reserved
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Author: Dam Sunwoo
+#
+# Sample stats config file (AtomicSimpleCPU) for m5stats2streamline.py
+#
+# Stats grouped together will show as grouped in Streamline.
+# E.g.,
+#
+# icache =
+#    icache.overall_hits::total
+#    icache.overall_misses::total
+#
+# will display the icache as a stacked line chart.
+# Charts will still be configurable in Streamline.
+
+[PER_CPU_STATS]
+# "system.cpu#." will automatically prepended for per-CPU stats
+
+cycles =
+    num_busy_cycles
+    num_idle_cycles
+
+register_access =
+    num_int_register_reads
+    num_int_register_writes
+
+mem_refs =
+    num_mem_refs
+
+inst_breakdown =
+    num_conditional_control_insts
+    num_int_insts
+    num_fp_insts
+    num_load_insts
+    num_store_insts
+
+icache =
+    icache.overall_hits::total
+    icache.overall_misses::total
+
+dcache =
+    dcache.overall_hits::total
+    dcache.overall_misses::total
+
+[PER_SWITCHCPU_STATS]
+# If starting from checkpoints, gem5 keeps CPU stats in system.switch_cpus# 
structures.
+# List per-switchcpu stats here if any
+# "system.switch_cpus#" will automatically prepended for per-CPU stats
+
+[PER_L2_STATS]
+
+l2 =
+    overall_hits::total
+    overall_misses::total
+
+[OTHER_STATS]
+
+physmem =
+    system.physmem.bw_total::total
diff -r b105ac205021 -r cc9dc514036e util/streamline/m5stats2streamline.py
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/util/streamline/m5stats2streamline.py     Thu Oct 17 10:20:45 2013 -0500
@@ -0,0 +1,1232 @@
+#!/usr/bin/env python
+
+# Copyright (c) 2012 ARM Limited
+# All rights reserved
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Author: Dam Sunwoo
+#
+
+# This script converts gem5 output to ARM DS-5 Streamline .apc project file
+# (Requires the gem5 runs to be run with ContextSwitchStatsDump enabled and
+# some patches applied to target Linux kernel.)
+# Visit http://www.gem5.org/Streamline for more details.
+#
+# Usage:
+# m5stats2streamline.py <stat_config.ini> <gem5 run folder> <dest .apc folder>
+#
+# <stat_config.ini>: .ini file that describes which stats to be included
+#                    in conversion. Sample .ini files can be found in
+#                    util/streamline.
+#                    NOTE: this is NOT the gem5 config.ini file.
+#
+# <gem5 run folder>: Path to gem5 run folder (must contain config.ini,
+#                    stats.txt[.gz], and system.tasks.txt.)
+#
+# <dest .apc folder>: Destination .apc folder path
+#
+# APC project generation based on Gator v12 (DS-5 v5.13)
+# Subsequent versions should be backward compatible
+
+import re, sys, os
+from ConfigParser import ConfigParser
+import gzip
+import xml.etree.ElementTree as ET
+import xml.dom.minidom as minidom
+import shutil
+import zlib
+
+import argparse
+
+parser = argparse.ArgumentParser(
+        formatter_class=argparse.RawDescriptionHelpFormatter,
+        description="""
+        Converts gem5 runs to ARM DS-5 Streamline .apc project file.
+        (NOTE: Requires gem5 runs to be run with ContextSwitchStatsDump
+        enabled and some patches applied to the target Linux kernel.)
+
+        Visit http://www.gem5.org/Streamline for more details.
+
+        APC project generation based on Gator v12 (DS-5 v5.13)
+        Subsequent versions should be backward compatible
+        """)
+
+parser.add_argument("stat_config_file", metavar="<stat_config.ini>",
+                    help=".ini file that describes which stats to be included \
+                    in conversion. Sample .ini files can be found in \
+                    util/streamline. NOTE: this is NOT the gem5 config.ini \
+                    file.")
+
+parser.add_argument("input_path", metavar="<gem5 run folder>",
+                    help="Path to gem5 run folder (must contain config.ini, \
+                    stats.txt[.gz], and system.tasks.txt.)")
+
+parser.add_argument("output_path", metavar="<dest .apc folder>",
+                    help="Destination .apc folder path")
+
+parser.add_argument("--num-events", action="store", type=int,
+                    default=1000000,
+                    help="Maximum number of scheduling (context switch) \
+                    events to be processed. Set to truncate early. \
+                    Default=1000000")
+
+parser.add_argument("--gzipped-bmp-not-supported", action="store_true",
+                    help="Do not use gzipped .bmp files for visual 
annotations. \
+                    This option is only required when using Streamline 
versions \
+                    older than 5.14")
+
+parser.add_argument("--verbose", action="store_true",
+                    help="Enable verbose output")
+
+args = parser.parse_args()
+
+if not re.match("(.*)\.apc", args.output_path):
+    print "ERROR: <dest .apc folder> should end with '.apc'!"
+    sys.exit(1)
+
+# gzipped BMP files for visual annotation is supported in Streamline 5.14.
+# Setting this to True will significantly compress the .apc binary file that
+# includes frame buffer snapshots.
+gzipped_bmp_supported = not args.gzipped_bmp_not_supported
+
+ticks_in_ns = -1
+
+# Default max # of events. Increase this for longer runs.
+num_events = args.num_events
+
+start_tick = -1
+end_tick = -1
+
+# Parse gem5 config.ini file to determine some system configurations.
+# Number of CPUs, L2s, etc.
+def parseConfig(config_file):
+    global num_cpus, num_l2
+
+    print "\n==============================="
+    print "Parsing gem5 config.ini file..."
+    print config_file
+    print "===============================\n"
+    config = ConfigParser()
+    if not config.read(config_file):
+        print "ERROR: config file '", config_file, "' not found"
+        sys.exit(1)
+
+    if config.has_section("system.cpu"):
+        num_cpus = 1
+    else:
+        num_cpus = 0
+        while config.has_section("system.cpu" + str(num_cpus)):
+            num_cpus += 1
+
+    if config.has_section("system.l2"):
+        num_l2 = 1
+    else:
+        num_l2 = 0
+        while config.has_section("system.l2" + str(num_l2)):
+            num_l2 += 1
+
+    print "Num CPUs:", num_cpus
+    print "Num L2s:", num_l2
+    print ""
+
+    return (num_cpus, num_l2)
+
+
+process_dict = {}
+thread_dict = {}
+
+process_list = []
+
+idle_uid = -1
+kernel_uid = -1
+
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