Your answer probably takes precedence, but: 

8.5.1.7 If there are fewer initializer-clauses in the list than there
are members in the aggregate, then each member not explicitly
initialized shall be initialized from an empty initializer list (8.5.4).


 Ali 

On 16.12.2013 12:01, nathan binkert wrote: 

> A little bit of language lawyer here. {} doesn't do anything in this
> context. {0} initializes only the first element to zero. That said, none
> of this matters because (from C++ 11 standard):
> 
> 3.6.2 Initialization of non-local variables
> 
> "Variables with static storage duration (3.7.1) or thread storage duration (
> 3.7.2) shall be zero-initialized (8.5) before any other initialization
> takes place."
> 
> On Mon, Dec 16, 2013 at 7:57 AM, Anthony Gutierrez <[email protected]>wrote:
> On Dec. 15, 2013, 10:59 p.m., Anthony Gutierrez wrote: 
> src/cpu/simple/atomic.cc, line 403 
> <http://reviews.gem5.org/r/2107/diff/1/?file=38213#file38213line403 [1]> 
> memset? Ali Saidi wrote: It's static so mem-setting won't really work (or at 
> least it would
 have to be initialized else where. My goal was simply to create a
reusable block of all zeros. I'd imagine the compiler will allocate it
out of the bas (but I'm not sure) so it will be part of a larger memset
of that whole area by the loader. 

> Anthony Gutierrez wrote: Ah. Didn't catch the static part before. Ali Saidi 
> wrote: Actually, Mitch just pointed to toward a stack overflow article that
 it can be replaced with: 

> static uint8_t zero_array[64] = {}; and the compile will take care
 of the rest. 

> Consider it done. Thanks, Ali
 I was going to suggest = {0}, which I believe will also work, and is a
little more explicit. - Anthony
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[5]----------------------------------------------------------- On Nov.
30, 2013, 11:51 p.m., Ali Saidi wrote: 

> ----------------------------------------------------------- This is an 
> automatically generated e-mail. To reply, visit: 
> http://reviews.gem5.org/r/2107/ [2] 
> ----------------------------------------------------------- (Updated Nov. 30, 
> 2013, 11:51 p.m.) Review request for Default. Repository: gem5 Description 
> ------- Changeset 10007:7b245b85f5c3 --------------------------- cpu: Add 
> support for instructions that zero cache lines. Diffs ----- 
> src/cpu/base_dyn_inst_impl.hh 81d7551dd3be src/cpu/o3/lsq_unit.hh 
> 81d7551dd3be src/cpu/o3/lsq_unit_impl.hh 81d7551dd3be 
> src/cpu/simple/atomic.cc 81d7551dd3be src/cpu/simple/timing.cc 81d7551dd3be 
> src/mem/request.hh 81d7551dd3be Diff: http://reviews.gem5.org/r/2107/diff/ 
> [3] Testing ------- Thanks, Ali Saidi
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