[gem5-dev] changeset in gem5: scons: Fixes uninitialized warnings issued by...

[Mitch Hayenga]

changeset ff709c429b7b in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=ff709c429b7b
description:
        scons: Fixes uninitialized warnings issued by clang

        Small fixes to appease recent clang versions.

diffstat:

 src/arch/arm/insts/fplib.cc |  4 ++--
 src/base/compiler.hh        |  7 +++++++
 src/cpu/o3/scoreboard.hh    |  2 +-
 src/sim/probe/probe.hh      |  2 +-
 4 files changed, 11 insertions(+), 4 deletions(-)

diffs (62 lines):

diff -r af1ec649e251 -r ff709c429b7b src/arch/arm/insts/fplib.cc
--- a/src/arch/arm/insts/fplib.cc       Fri Mar 07 15:56:23 2014 -0500
+++ b/src/arch/arm/insts/fplib.cc       Fri Mar 07 15:56:23 2014 -0500
@@ -2509,7 +2509,7 @@
         result = fp32_infinity(sgn);
         flags |= FPLIB_DZC;
     } else if (!((uint32_t)(op << 1) >> 22)) {
-        bool overflow_to_inf;
+        bool overflow_to_inf = false;
         switch (FPCRRounding(fpscr)) {
           case FPRounding_TIEEVEN:
             overflow_to_inf = true;
@@ -2570,7 +2570,7 @@
         result = fp64_infinity(sgn);
         flags |= FPLIB_DZC;
     } else if (!((uint64_t)(op << 1) >> 51)) {
-        bool overflow_to_inf;
+        bool overflow_to_inf = false;
         switch (FPCRRounding(fpscr)) {
           case FPRounding_TIEEVEN:
             overflow_to_inf = true;
diff -r af1ec649e251 -r ff709c429b7b src/base/compiler.hh
--- a/src/base/compiler.hh      Fri Mar 07 15:56:23 2014 -0500
+++ b/src/base/compiler.hh      Fri Mar 07 15:56:23 2014 -0500
@@ -50,6 +50,13 @@
 #define M5_PRAGMA_NORETURN(x)
 #define M5_DUMMY_RETURN
 #define M5_VAR_USED __attribute__((unused))
+
+#if defined(__clang__)
+#define M5_CLASS_VAR_USED M5_VAR_USED
+#else
+#define M5_CLASS_VAR_USED
+#endif
+
 #define M5_ATTR_PACKED __attribute__ ((__packed__))
 #define M5_NO_INLINE __attribute__ ((__noinline__))
 #else
diff -r af1ec649e251 -r ff709c429b7b src/cpu/o3/scoreboard.hh
--- a/src/cpu/o3/scoreboard.hh  Fri Mar 07 15:56:23 2014 -0500
+++ b/src/cpu/o3/scoreboard.hh  Fri Mar 07 15:56:23 2014 -0500
@@ -72,7 +72,7 @@
      * the misc registers that come after the physical registers and
      * which are hardwired to be always considered ready.
      */
-    unsigned numTotalRegs;
+    unsigned M5_CLASS_VAR_USED numTotalRegs;
 
     /** The index of the zero register. */
     PhysRegIndex zeroRegIdx;
diff -r af1ec649e251 -r ff709c429b7b src/sim/probe/probe.hh
--- a/src/sim/probe/probe.hh    Fri Mar 07 15:56:23 2014 -0500
+++ b/src/sim/probe/probe.hh    Fri Mar 07 15:56:23 2014 -0500
@@ -133,7 +133,7 @@
 {
   private:
     /** Required for sensible debug messages.*/
-    const SimObject *object;
+    const M5_CLASS_VAR_USED SimObject *object;
     /** Vector for name look-up. */
     std::vector<ProbePoint *> points;
 
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