changeset 23384aa97d85 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=23384aa97d85
description:
stats: update for syscall DPRINTF change
Only printing one rather than two args for the ignored syscall
warning means the count of register accesses has changed on
a few runs. Oddly only Alpha Tru64 seems to have any ignored
syscalls in the regression tests.
diffstat:
tests/long/se/30.eon/ref/alpha/tru64/o3-timing/config.ini | 14 ++++++++++-
tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simerr | 2 +-
tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simout | 6 +---
tests/long/se/30.eon/ref/alpha/tru64/o3-timing/stats.txt | 12 ++++----
tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini | 14 ++++++++++-
tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simerr | 4 +-
tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simout | 4 +-
tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt | 12 ++++----
tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini | 14 ++++++++++-
tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simerr | 2 +-
tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simout | 6 +---
tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt | 12 ++++----
tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/config.ini | 14 ++++++++++-
tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/simerr | 2 +-
tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/simout | 6 +---
tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt | 12 ++++----
tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/config.ini | 14 ++++++++++-
tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/simerr | 2 +-
tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/simout | 6 +---
tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/stats.txt | 12 ++++----
tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini | 14 ++++++++++-
tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simerr | 2 +-
tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simout | 6 +---
tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt | 12 ++++----
24 files changed, 133 insertions(+), 71 deletions(-)
diffs (truncated from 575 to 300 lines):
diff -r 563696c791d2 -r 23384aa97d85
tests/long/se/30.eon/ref/alpha/tru64/o3-timing/config.ini
--- a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/config.ini Sat Jul 19
02:06:22 2014 -0700
+++ b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/config.ini Sat Jul 19
19:04:58 2014 -0700
@@ -10,7 +10,7 @@
[system]
type=System
-children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
+children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem
voltage_domain
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
@@ -37,7 +37,9 @@
[system.clk_domain]
type=SrcClockDomain
clock=1000
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
[system.cpu]
@@ -615,9 +617,19 @@
[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
+[system.dvfs_handler]
+type=DVFSHandler
+domains=
+enable=false
+eventq_index=0
+sys_clk_domain=system.clk_domain
+transition_latency=100000000
+
[system.membus]
type=CoherentBus
clk_domain=system.clk_domain
diff -r 563696c791d2 -r 23384aa97d85
tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simerr
--- a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simerr Sat Jul 19
02:06:22 2014 -0700
+++ b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simerr Sat Jul 19
19:04:58 2014 -0700
@@ -48,4 +48,4 @@
12 8 14
13 8 14
14 8 14
-warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...)
+warn: ignoring syscall sigprocmask(1, ...)
diff -r 563696c791d2 -r 23384aa97d85
tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simout
--- a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simout Sat Jul 19
02:06:22 2014 -0700
+++ b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simout Sat Jul 19
19:04:58 2014 -0700
@@ -1,10 +1,8 @@
-Redirecting stdout to
build/ALPHA/tests/opt/long/se/30.eon/alpha/tru64/o3-timing/simout
-Redirecting stderr to
build/ALPHA/tests/opt/long/se/30.eon/alpha/tru64/o3-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jun 21 2014 10:36:29
-gem5 started Jun 21 2014 11:54:16
+gem5 compiled Jul 19 2014 12:27:06
+gem5 started Jul 19 2014 12:27:28
gem5 executing on phenom
command line: build/ALPHA/gem5.opt -d
build/ALPHA/tests/opt/long/se/30.eon/alpha/tru64/o3-timing -re
/home/stever/hg/m5sim.org/gem5/tests/run.py
build/ALPHA/tests/opt/long/se/30.eon/alpha/tru64/o3-timing
Global frequency set at 1000000000000 ticks per second
diff -r 563696c791d2 -r 23384aa97d85
tests/long/se/30.eon/ref/alpha/tru64/o3-timing/stats.txt
--- a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/stats.txt Sat Jul 19
02:06:22 2014 -0700
+++ b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/stats.txt Sat Jul 19
19:04:58 2014 -0700
@@ -4,11 +4,11 @@
sim_ticks 72880000500 #
Number of ticks simulated
final_tick 72880000500 #
Number of ticks from beginning of simulation (restored from checkpoints and
never reset)
sim_freq 1000000000000 #
Frequency of simulated ticks
-host_inst_rate 218596 #
Simulator instruction rate (inst/s)
-host_op_rate 218596 #
Simulator op (including micro ops) rate (op/s)
-host_tick_rate 42418396 #
Simulator tick rate (ticks/s)
-host_mem_usage 228344 #
Number of bytes of host memory used
-host_seconds 1718.12 #
Real time elapsed on the host
+host_inst_rate 219272 #
Simulator instruction rate (inst/s)
+host_op_rate 219272 #
Simulator op (including micro ops) rate (op/s)
+host_tick_rate 42549566 #
Simulator tick rate (ticks/s)
+host_mem_usage 229100 #
Number of bytes of host memory used
+host_seconds 1712.83 #
Real time elapsed on the host
sim_insts 375574808 #
Number of instructions simulated
sim_ops 375574808 #
Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 #
Voltage in Volts
@@ -575,7 +575,7 @@
system.cpu.cpi_total 0.388098 #
CPI: Total CPI of All Threads
system.cpu.ipc 2.576666 #
IPC: Instructions Per Cycle
system.cpu.ipc_total 2.576666 #
IPC: Total IPC of All Threads
-system.cpu.int_regfile_reads 400324800 #
number of integer regfile reads
+system.cpu.int_regfile_reads 400324799 #
number of integer regfile reads
system.cpu.int_regfile_writes 170964393 #
number of integer regfile writes
system.cpu.fp_regfile_reads 157088507 #
number of floating regfile reads
system.cpu.fp_regfile_writes 104631166 #
number of floating regfile writes
diff -r 563696c791d2 -r 23384aa97d85
tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini
--- a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini Sat Jul
19 02:06:22 2014 -0700
+++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini Sat Jul
19 19:04:58 2014 -0700
@@ -10,7 +10,7 @@
[system]
type=System
-children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
+children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem
voltage_domain
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
@@ -37,7 +37,9 @@
[system.clk_domain]
type=SrcClockDomain
clock=1000
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
[system.cpu]
@@ -615,9 +617,19 @@
[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
+[system.dvfs_handler]
+type=DVFSHandler
+domains=
+enable=false
+eventq_index=0
+sys_clk_domain=system.clk_domain
+transition_latency=100000000
+
[system.membus]
type=CoherentBus
clk_domain=system.clk_domain
diff -r 563696c791d2 -r 23384aa97d85
tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simerr
--- a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simerr Sat Jul 19
02:06:22 2014 -0700
+++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simerr Sat Jul 19
19:04:58 2014 -0700
@@ -2,5 +2,5 @@
warn: Prefetch instructions in Alpha do not do anything
warn: Prefetch instructions in Alpha do not do anything
warn: Prefetch instructions in Alpha do not do anything
-warn: ignoring syscall sigprocmask(0, 1, ...)
-warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...)
+warn: ignoring syscall sigprocmask(1, ...)
+warn: ignoring syscall sigprocmask(1, ...)
diff -r 563696c791d2 -r 23384aa97d85
tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simout
--- a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simout Sat Jul 19
02:06:22 2014 -0700
+++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simout Sat Jul 19
19:04:58 2014 -0700
@@ -1,8 +1,8 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jun 21 2014 10:36:29
-gem5 started Jun 21 2014 21:27:33
+gem5 compiled Jul 19 2014 12:27:06
+gem5 started Jul 19 2014 12:27:27
gem5 executing on phenom
command line: build/ALPHA/gem5.opt -d
build/ALPHA/tests/opt/long/se/40.perlbmk/alpha/tru64/o3-timing -re
/home/stever/hg/m5sim.org/gem5/tests/run.py
build/ALPHA/tests/opt/long/se/40.perlbmk/alpha/tru64/o3-timing
Global frequency set at 1000000000000 ticks per second
diff -r 563696c791d2 -r 23384aa97d85
tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt
--- a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt Sat Jul
19 02:06:22 2014 -0700
+++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt Sat Jul
19 19:04:58 2014 -0700
@@ -4,11 +4,11 @@
sim_ticks 635929494500 #
Number of ticks simulated
final_tick 635929494500 #
Number of ticks from beginning of simulation (restored from checkpoints and
never reset)
sim_freq 1000000000000 #
Frequency of simulated ticks
-host_inst_rate 162504 #
Simulator instruction rate (inst/s)
-host_op_rate 162504 #
Simulator op (including micro ops) rate (op/s)
-host_tick_rate 56685894 #
Simulator tick rate (ticks/s)
-host_mem_usage 228544 #
Number of bytes of host memory used
-host_seconds 11218.48 #
Real time elapsed on the host
+host_inst_rate 181383 #
Simulator instruction rate (inst/s)
+host_op_rate 181383 #
Simulator op (including micro ops) rate (op/s)
+host_tick_rate 63271586 #
Simulator tick rate (ticks/s)
+host_mem_usage 229300 #
Number of bytes of host memory used
+host_seconds 10050.79 #
Real time elapsed on the host
sim_insts 1823043370 #
Number of instructions simulated
sim_ops 1823043370 #
Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 #
Voltage in Volts
@@ -602,7 +602,7 @@
system.cpu.cpi_total 0.697657 #
CPI: Total CPI of All Threads
system.cpu.ipc 1.433369 #
IPC: Instructions Per Cycle
system.cpu.ipc_total 1.433369 #
IPC: Total IPC of All Threads
-system.cpu.int_regfile_reads 2650222632 #
number of integer regfile reads
+system.cpu.int_regfile_reads 2650222630 #
number of integer regfile reads
system.cpu.int_regfile_writes 1504597172 #
number of integer regfile writes
system.cpu.fp_regfile_reads 79149378 #
number of floating regfile reads
system.cpu.fp_regfile_writes 52661639 #
number of floating regfile writes
diff -r 563696c791d2 -r 23384aa97d85
tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini
--- a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini Sat Jul
19 02:06:22 2014 -0700
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini Sat Jul
19 19:04:58 2014 -0700
@@ -10,7 +10,7 @@
[system]
type=System
-children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
+children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem
voltage_domain
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
@@ -37,7 +37,9 @@
[system.clk_domain]
type=SrcClockDomain
clock=1000
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
[system.cpu]
@@ -615,9 +617,19 @@
[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
+[system.dvfs_handler]
+type=DVFSHandler
+domains=
+enable=false
+eventq_index=0
+sys_clk_domain=system.clk_domain
+transition_latency=100000000
+
[system.membus]
type=CoherentBus
clk_domain=system.clk_domain
diff -r 563696c791d2 -r 23384aa97d85
tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simerr
--- a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simerr Sat Jul 19
02:06:22 2014 -0700
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simerr Sat Jul 19
19:04:58 2014 -0700
@@ -2,4 +2,4 @@
warn: Prefetch instructions in Alpha do not do anything
warn: Prefetch instructions in Alpha do not do anything
warn: Prefetch instructions in Alpha do not do anything
-warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...)
+warn: ignoring syscall sigprocmask(1, ...)
diff -r 563696c791d2 -r 23384aa97d85
tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simout
--- a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simout Sat Jul 19
02:06:22 2014 -0700
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simout Sat Jul 19
19:04:58 2014 -0700
@@ -1,10 +1,8 @@
-Redirecting stdout to
build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/o3-timing/simout
-Redirecting stderr to
build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/o3-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jun 21 2014 10:36:29
-gem5 started Jun 21 2014 12:22:04
+gem5 compiled Jul 19 2014 12:27:06
+gem5 started Jul 19 2014 12:27:28
gem5 executing on phenom
command line: build/ALPHA/gem5.opt -d
build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/o3-timing -re
/home/stever/hg/m5sim.org/gem5/tests/run.py
build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/o3-timing
Global frequency set at 1000000000000 ticks per second
diff -r 563696c791d2 -r 23384aa97d85
tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt
--- a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt Sat Jul
19 02:06:22 2014 -0700
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt Sat Jul
19 19:04:58 2014 -0700
@@ -4,11 +4,11 @@
sim_ticks 24220559500 #
Number of ticks simulated
final_tick 24220559500 #
Number of ticks from beginning of simulation (restored from checkpoints and
never reset)
sim_freq 1000000000000 #
Frequency of simulated ticks
-host_inst_rate 197323 #
Simulator instruction rate (inst/s)
-host_op_rate 197323 #
Simulator op (including micro ops) rate (op/s)
-host_tick_rate 60047490 #
Simulator tick rate (ticks/s)
-host_mem_usage 230944 #
Number of bytes of host memory used
-host_seconds 403.36 #
Real time elapsed on the host
+host_inst_rate 196594 #
Simulator instruction rate (inst/s)
+host_op_rate 196594 #
Simulator op (including micro ops) rate (op/s)
+host_tick_rate 59825545 #
Simulator tick rate (ticks/s)
+host_mem_usage 231620 #
Number of bytes of host memory used
+host_seconds 404.85 #
Real time elapsed on the host
sim_insts 79591756 #
Number of instructions simulated
sim_ops 79591756 #
Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 #
Voltage in Volts
@@ -606,7 +606,7 @@
system.cpu.cpi_total 0.608620 #
CPI: Total CPI of All Threads
system.cpu.ipc 1.643062 #
IPC: Instructions Per Cycle
system.cpu.ipc_total 1.643062 #
IPC: Total IPC of All Threads
-system.cpu.int_regfile_reads 116607972 #
number of integer regfile reads
+system.cpu.int_regfile_reads 116607971 #
number of integer regfile reads
system.cpu.int_regfile_writes 57833573 #
number of integer regfile writes
system.cpu.fp_regfile_reads 254535 #
number of floating regfile reads
system.cpu.fp_regfile_writes 240366 #
number of floating regfile writes
diff -r 563696c791d2 -r 23384aa97d85
tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/config.ini
--- a/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/config.ini Sat Jul
19 02:06:22 2014 -0700
+++ b/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/config.ini Sat Jul
19 19:04:58 2014 -0700
@@ -10,7 +10,7 @@
[system]
type=System
-children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
+children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem
voltage_domain
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
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