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Review request for Default. Repository: gem5 Description ------- This patch adds support for tCCD to the DRAM controller. After changeset 10211: e084db2b1527 (Merge DRAM latency calculation and bank state update), DRAM latency calculations has changed and that changeset provides a rather simple way to incorporate the tCCD parameter into latency calculations. Diffs ----- src/mem/DRAMCtrl.py UNKNOWN src/mem/dram_ctrl.hh UNKNOWN src/mem/dram_ctrl.cc UNKNOWN Diff: http://reviews.gem5.org/r/2316/diff/ Testing ------- None Thanks, Amin Farmahini _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
