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build_opts/NULL <http://reviews.gem5.org/r/2348/#comment4820> Could you elaborate on this one? Are we also transitioning the Ruby tests to use the NULL ISA? src/cpu/testers/traffic_gen/generators.cc <http://reviews.gem5.org/r/2348/#comment4821> This probably breaks a bunch of python scripts as well? src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc <http://reviews.gem5.org/r/2348/#comment4822> Can even use range-based for to make it neater src/mem/ruby/slicc_interface/AbstractController.hh <http://reviews.gem5.org/r/2348/#comment4823> Is this a bug fix? src/proto/packet.proto <http://reviews.gem5.org/r/2348/#comment4824> I fear this will bugger up the python utilities. I'm not sure I understand how the MessageBuffer relates to the existing ports in gem5. Is a MessageBuffer a kind of channel in TLM terminology? Would it not be possible to make the buffer either input or output and then simply connect the ports? Perhaps I'm missing something here as I'm not too familiar with Ruby. - Andreas Hansson On Aug. 16, 2014, 1:17 a.m., Nilay Vaish wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2348/ > ----------------------------------------------------------- > > (Updated Aug. 16, 2014, 1:17 a.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 10292:ca80c52fa694 > --------------------------- > ruby: message buffers: significant changes > > This patch is the final patch in a series of patches. The aim of the series > is to make ruby more configurable than it was. More specifically, the > connections between controllers are not at all possible (unless one is ready > to make significant changes to the coherence protocol). Moreover the buffers > themselves are magically connected to the network inside the slicc code. > These connections are not part of the configuration file. > > This patch makes changes so that these connections will now be made in the > python configuration files associated with the protocols. This requires > each state machine to expose the message buffers it uses for input and output. > So, the patch makes these buffers configurable members of the machines. > > The patch drops the slicc code that usd to connect these buffers to the > network. Now these buffers are exposed to the python configuration system > as Master and Slave ports. In the configuration files, any master port > can be connected any slave port. The file pyobject.cc has been modified to > take care of allocating the actual message buffer. This is inline with how > other port connections work. > > > Diffs > ----- > > build_opts/NULL 79fde1c67ed8 > configs/ruby/MESI_Three_Level.py 79fde1c67ed8 > configs/ruby/MESI_Two_Level.py 79fde1c67ed8 > configs/ruby/MI_example.py 79fde1c67ed8 > configs/ruby/MOESI_CMP_directory.py 79fde1c67ed8 > configs/ruby/MOESI_CMP_token.py 79fde1c67ed8 > configs/ruby/MOESI_hammer.py 79fde1c67ed8 > configs/ruby/Network_test.py 79fde1c67ed8 > configs/ruby/Ruby.py 79fde1c67ed8 > src/cpu/testers/traffic_gen/generators.cc 79fde1c67ed8 > src/mem/comm_monitor.cc 79fde1c67ed8 > src/mem/protocol/MESI_Three_Level-L0cache.sm 79fde1c67ed8 > src/mem/protocol/MESI_Three_Level-L1cache.sm 79fde1c67ed8 > src/mem/protocol/MESI_Two_Level-L1cache.sm 79fde1c67ed8 > src/mem/protocol/MESI_Two_Level-L2cache.sm 79fde1c67ed8 > src/mem/protocol/MESI_Two_Level-dir.sm 79fde1c67ed8 > src/mem/protocol/MESI_Two_Level-dma.sm 79fde1c67ed8 > src/mem/protocol/MI_example-cache.sm 79fde1c67ed8 > src/mem/protocol/MI_example-dir.sm 79fde1c67ed8 > src/mem/protocol/MI_example-dma.sm 79fde1c67ed8 > src/mem/protocol/MOESI_CMP_directory-L1cache.sm 79fde1c67ed8 > src/mem/protocol/MOESI_CMP_directory-L2cache.sm 79fde1c67ed8 > src/mem/protocol/MOESI_CMP_directory-dir.sm 79fde1c67ed8 > src/mem/protocol/MOESI_CMP_directory-dma.sm 79fde1c67ed8 > src/mem/protocol/MOESI_CMP_token-L1cache.sm 79fde1c67ed8 > src/mem/protocol/MOESI_CMP_token-L2cache.sm 79fde1c67ed8 > src/mem/protocol/MOESI_CMP_token-dir.sm 79fde1c67ed8 > src/mem/protocol/MOESI_CMP_token-dma.sm 79fde1c67ed8 > src/mem/protocol/MOESI_hammer-cache.sm 79fde1c67ed8 > src/mem/protocol/MOESI_hammer-dir.sm 79fde1c67ed8 > src/mem/protocol/MOESI_hammer-dma.sm 79fde1c67ed8 > src/mem/protocol/Network_test-cache.sm 79fde1c67ed8 > src/mem/protocol/Network_test-dir.sm 79fde1c67ed8 > src/mem/ruby/SConscript 79fde1c67ed8 > src/mem/ruby/network/Network.hh 79fde1c67ed8 > src/mem/ruby/network/Network.cc 79fde1c67ed8 > src/mem/ruby/network/Network.py 79fde1c67ed8 > src/mem/ruby/network/garnet/BaseGarnetNetwork.hh 79fde1c67ed8 > src/mem/ruby/network/garnet/BaseGarnetNetwork.cc 79fde1c67ed8 > src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.hh > 79fde1c67ed8 > src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc > 79fde1c67ed8 > src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.hh > 79fde1c67ed8 > src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc > 79fde1c67ed8 > src/mem/ruby/network/garnet/flexible-pipeline/Router.cc 79fde1c67ed8 > src/mem/ruby/network/garnet/flexible-pipeline/flitBuffer.hh 79fde1c67ed8 > src/mem/ruby/network/garnet/flexible-pipeline/flitBuffer.cc 79fde1c67ed8 > src/mem/ruby/network/simple/PerfectSwitch.hh 79fde1c67ed8 > src/mem/ruby/network/simple/PerfectSwitch.cc 79fde1c67ed8 > src/mem/ruby/network/simple/SimpleNetwork.hh 79fde1c67ed8 > src/mem/ruby/network/simple/SimpleNetwork.cc 79fde1c67ed8 > src/mem/ruby/network/simple/Switch.hh 79fde1c67ed8 > src/mem/ruby/network/simple/Switch.cc 79fde1c67ed8 > src/mem/ruby/network/simple/Throttle.hh 79fde1c67ed8 > src/mem/ruby/network/simple/Throttle.cc 79fde1c67ed8 > src/mem/ruby/slicc_interface/AbstractController.hh 79fde1c67ed8 > src/mem/ruby/slicc_interface/AbstractController.cc 79fde1c67ed8 > src/mem/ruby/slicc_interface/Controller.py 79fde1c67ed8 > src/mem/slicc/symbols/StateMachine.py 79fde1c67ed8 > src/proto/packet.proto 79fde1c67ed8 > src/python/swig/pyobject.cc 79fde1c67ed8 > > Diff: http://reviews.gem5.org/r/2348/diff/ > > > Testing > ------- > > > Thanks, > > Nilay Vaish > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
