changeset a9023811bf9e in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=a9023811bf9e
description:
alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate
activate(), suspend(), and halt() used on thread contexts had an
optional
delay parameter. However this parameter was often ignored. Also, when
used,
the delay was seemily arbitrarily set to 0 or 1 cycle (no other delays
were
ever specified). This patch removes the delay parameter and 'Events'
associated with them across all ISAs and cores. Unused activate logic
is also removed.
diffstat:
src/arch/alpha/utility.hh | 2 +-
src/arch/arm/utility.hh | 2 +-
src/arch/mips/mt.hh | 2 +-
src/arch/mips/utility.cc | 2 +-
src/arch/power/utility.hh | 2 +-
src/arch/sparc/utility.hh | 2 +-
src/arch/x86/utility.cc | 4 +-
src/cpu/base.hh | 8 +-
src/cpu/checker/thread_context.hh | 10 +-
src/cpu/inorder/cpu.cc | 12 +-
src/cpu/inorder/cpu.hh | 6 +-
src/cpu/inorder/thread_context.cc | 8 +-
src/cpu/inorder/thread_context.hh | 13 +-
src/cpu/kvm/base.cc | 6 +-
src/cpu/kvm/base.hh | 2 +-
src/cpu/minor/cpu.cc | 30 +---
src/cpu/minor/cpu.hh | 19 +---
src/cpu/o3/cpu.cc | 212 ++-----------------------------------
src/cpu/o3/cpu.hh | 124 +---------------------
src/cpu/o3/fetch_impl.hh | 8 +-
src/cpu/o3/thread_context.hh | 9 +-
src/cpu/o3/thread_context_impl.hh | 11 +-
src/cpu/simple/atomic.cc | 6 +-
src/cpu/simple/atomic.hh | 2 +-
src/cpu/simple/timing.cc | 6 +-
src/cpu/simple/timing.hh | 2 +-
src/cpu/simple_thread.cc | 12 +-
src/cpu/simple_thread.hh | 5 +-
src/cpu/thread_context.hh | 19 +-
src/sim/process.cc | 2 +-
30 files changed, 95 insertions(+), 453 deletions(-)
diffs (truncated from 1157 to 300 lines):
diff -r 3819b85ff21a -r a9023811bf9e src/arch/alpha/utility.hh
--- a/src/arch/alpha/utility.hh Sat Sep 20 17:18:33 2014 -0400
+++ b/src/arch/alpha/utility.hh Sat Sep 20 17:18:35 2014 -0400
@@ -68,7 +68,7 @@
// Alpha IPR register accessors
inline bool PcPAL(Addr addr) { return addr & 0x3; }
inline void startupCPU(ThreadContext *tc, int cpuId)
-{ tc->activate(Cycles(0)); }
+{ tc->activate(); }
////////////////////////////////////////////////////////////////////////
//
diff -r 3819b85ff21a -r a9023811bf9e src/arch/arm/utility.hh
--- a/src/arch/arm/utility.hh Sat Sep 20 17:18:33 2014 -0400
+++ b/src/arch/arm/utility.hh Sat Sep 20 17:18:35 2014 -0400
@@ -104,7 +104,7 @@
inline void startupCPU(ThreadContext *tc, int cpuId)
{
- tc->activate(Cycles(0));
+ tc->activate();
}
void copyRegs(ThreadContext *src, ThreadContext *dest);
diff -r 3819b85ff21a -r a9023811bf9e src/arch/mips/mt.hh
--- a/src/arch/mips/mt.hh Sat Sep 20 17:18:33 2014 -0400
+++ b/src/arch/mips/mt.hh Sat Sep 20 17:18:35 2014 -0400
@@ -96,7 +96,7 @@
// TODO: SET PC WITH AN EVENT INSTEAD OF INSTANTANEOUSLY
tc->pcState(restartPC);
- tc->activate(Cycles(0));
+ tc->activate();
warn("%i: Restoring thread %i in %s @ PC %x",
curTick(), tc->threadId(), tc->getCpuPtr()->name(), restartPC);
diff -r 3819b85ff21a -r a9023811bf9e src/arch/mips/utility.cc
--- a/src/arch/mips/utility.cc Sat Sep 20 17:18:33 2014 -0400
+++ b/src/arch/mips/utility.cc Sat Sep 20 17:18:35 2014 -0400
@@ -231,7 +231,7 @@
void
startupCPU(ThreadContext *tc, int cpuId)
{
- tc->activate(Cycles(0));
+ tc->activate();
}
void
diff -r 3819b85ff21a -r a9023811bf9e src/arch/power/utility.hh
--- a/src/arch/power/utility.hh Sat Sep 20 17:18:33 2014 -0400
+++ b/src/arch/power/utility.hh Sat Sep 20 17:18:35 2014 -0400
@@ -59,7 +59,7 @@
inline void
startupCPU(ThreadContext *tc, int cpuId)
{
- tc->activate(Cycles(0));
+ tc->activate();
}
void
diff -r 3819b85ff21a -r a9023811bf9e src/arch/sparc/utility.hh
--- a/src/arch/sparc/utility.hh Sat Sep 20 17:18:33 2014 -0400
+++ b/src/arch/sparc/utility.hh Sat Sep 20 17:18:35 2014 -0400
@@ -77,7 +77,7 @@
{
// Other CPUs will get activated by IPIs
if (cpuId == 0 || !FullSystem)
- tc->activate(Cycles(0));
+ tc->activate();
}
void copyRegs(ThreadContext *src, ThreadContext *dest);
diff -r 3819b85ff21a -r a9023811bf9e src/arch/x86/utility.cc
--- a/src/arch/x86/utility.cc Sat Sep 20 17:18:33 2014 -0400
+++ b/src/arch/x86/utility.cc Sat Sep 20 17:18:35 2014 -0400
@@ -203,12 +203,12 @@
void startupCPU(ThreadContext *tc, int cpuId)
{
if (cpuId == 0 || !FullSystem) {
- tc->activate(Cycles(0));
+ tc->activate();
} else {
// This is an application processor (AP). It should be initialized to
// look like only the BIOS POST has run on it and put then put it into
// a halted state.
- tc->suspend(Cycles(0));
+ tc->suspend();
}
}
diff -r 3819b85ff21a -r a9023811bf9e src/cpu/base.hh
--- a/src/cpu/base.hh Sat Sep 20 17:18:33 2014 -0400
+++ b/src/cpu/base.hh Sat Sep 20 17:18:35 2014 -0400
@@ -251,10 +251,8 @@
/// Provide access to the tracer pointer
Trace::InstTracer * getTracer() { return tracer; }
- /// Notify the CPU that the indicated context is now active. The
- /// delay parameter indicates the number of ticks to wait before
- /// executing (typically 0 or 1).
- virtual void activateContext(ThreadID thread_num, Cycles delay) {}
+ /// Notify the CPU that the indicated context is now active.
+ virtual void activateContext(ThreadID thread_num) {}
/// Notify the CPU that the indicated context is now suspended.
virtual void suspendContext(ThreadID thread_num) {}
@@ -285,8 +283,6 @@
virtual void startup();
virtual void regStats();
- virtual void activateWhenReady(ThreadID tid) {};
-
void registerThreadContexts();
/**
diff -r 3819b85ff21a -r a9023811bf9e src/cpu/checker/thread_context.hh
--- a/src/cpu/checker/thread_context.hh Sat Sep 20 17:18:33 2014 -0400
+++ b/src/cpu/checker/thread_context.hh Sat Sep 20 17:18:35 2014 -0400
@@ -157,16 +157,14 @@
checkerTC->setStatus(new_status);
}
- /// Set the status to Active. Optional delay indicates number of
- /// cycles to wait before beginning execution.
- void activate(Cycles delay = Cycles(1))
- { actualTC->activate(delay); }
+ /// Set the status to Active.
+ void activate() { actualTC->activate(); }
/// Set the status to Suspended.
- void suspend(Cycles delay) { actualTC->suspend(delay); }
+ void suspend() { actualTC->suspend(); }
/// Set the status to Halted.
- void halt(Cycles delay) { actualTC->halt(delay); }
+ void halt() { actualTC->halt(); }
void dumpFuncProfile() { actualTC->dumpFuncProfile(); }
diff -r 3819b85ff21a -r a9023811bf9e src/cpu/inorder/cpu.cc
--- a/src/cpu/inorder/cpu.cc Sat Sep 20 17:18:33 2014 -0400
+++ b/src/cpu/inorder/cpu.cc Sat Sep 20 17:18:35 2014 -0400
@@ -1090,11 +1090,11 @@
}
void
-InOrderCPU::deactivateContext(ThreadID tid, Cycles delay)
+InOrderCPU::deactivateContext(ThreadID tid)
{
DPRINTF(InOrderCPU,"[tid:%i]: Deactivating ...\n", tid);
- scheduleCpuEvent(DeactivateThread, NoFault, tid, dummyInst[tid], delay);
+ scheduleCpuEvent(DeactivateThread, NoFault, tid, dummyInst[tid]);
// Be sure to signal that there's some activity so the CPU doesn't
// deschedule itself.
@@ -1172,12 +1172,12 @@
}
void
-InOrderCPU::activateContext(ThreadID tid, Cycles delay)
+InOrderCPU::activateContext(ThreadID tid)
{
DPRINTF(InOrderCPU,"[tid:%i]: Activating ...\n", tid);
- scheduleCpuEvent(ActivateThread, NoFault, tid, dummyInst[tid], delay);
+ scheduleCpuEvent(ActivateThread, NoFault, tid, dummyInst[tid]);
// Be sure to signal that there's some activity so the CPU doesn't
// deschedule itself.
@@ -1187,12 +1187,12 @@
}
void
-InOrderCPU::activateNextReadyContext(Cycles delay)
+InOrderCPU::activateNextReadyContext()
{
DPRINTF(InOrderCPU,"Activating next ready thread\n");
scheduleCpuEvent(ActivateNextReadyThread, NoFault, 0/*tid*/, dummyInst[0],
- delay, ActivateNextReadyThread_Pri);
+ Cycles(0), ActivateNextReadyThread_Pri);
// Be sure to signal that there's some activity so the CPU doesn't
// deschedule itself.
diff -r 3819b85ff21a -r a9023811bf9e src/cpu/inorder/cpu.hh
--- a/src/cpu/inorder/cpu.hh Sat Sep 20 17:18:33 2014 -0400
+++ b/src/cpu/inorder/cpu.hh Sat Sep 20 17:18:35 2014 -0400
@@ -498,7 +498,7 @@
void trap(const Fault &fault, ThreadID tid, DynInstPtr inst);
/** Schedule thread activation on the CPU */
- void activateContext(ThreadID tid, Cycles delay = Cycles(0));
+ void activateContext(ThreadID tid);
/** Add Thread to Active Threads List. */
void activateThread(ThreadID tid);
@@ -507,13 +507,13 @@
void activateThreadInPipeline(ThreadID tid);
/** Schedule Thread Activation from Ready List */
- void activateNextReadyContext(Cycles delay = Cycles(0));
+ void activateNextReadyContext();
/** Add Thread From Ready List to Active Threads List. */
void activateNextReadyThread();
/** Schedule a thread deactivation on the CPU */
- void deactivateContext(ThreadID tid, Cycles delay = Cycles(0));
+ void deactivateContext(ThreadID tid);
/** Remove from Active Thread List */
void deactivateThread(ThreadID tid);
diff -r 3819b85ff21a -r a9023811bf9e src/cpu/inorder/thread_context.cc
--- a/src/cpu/inorder/thread_context.cc Sat Sep 20 17:18:33 2014 -0400
+++ b/src/cpu/inorder/thread_context.cc Sat Sep 20 17:18:35 2014 -0400
@@ -103,7 +103,7 @@
}
void
-InOrderThreadContext::activate(Cycles delay)
+InOrderThreadContext::activate()
{
DPRINTF(InOrderCPU, "Calling activate on Thread Context %d\n",
getThreadNum());
@@ -113,12 +113,12 @@
thread->setStatus(ThreadContext::Active);
- cpu->activateContext(thread->threadId(), delay);
+ cpu->activateContext(thread->threadId());
}
void
-InOrderThreadContext::suspend(Cycles delay)
+InOrderThreadContext::suspend()
{
DPRINTF(InOrderCPU, "Calling suspend on Thread Context %d\n",
getThreadNum());
@@ -131,7 +131,7 @@
}
void
-InOrderThreadContext::halt(Cycles delay)
+InOrderThreadContext::halt()
{
DPRINTF(InOrderCPU, "Calling halt on Thread Context %d\n",
getThreadNum());
diff -r 3819b85ff21a -r a9023811bf9e src/cpu/inorder/thread_context.hh
--- a/src/cpu/inorder/thread_context.hh Sat Sep 20 17:18:33 2014 -0400
+++ b/src/cpu/inorder/thread_context.hh Sat Sep 20 17:18:35 2014 -0400
@@ -179,15 +179,14 @@
void setStatus(Status new_status)
{ thread->setStatus(new_status); }
- /** Set the status to Active. Optional delay indicates number of
- * cycles to wait before beginning execution. */
- void activate(Cycles delay = Cycles(1));
+ /** Set the status to Active. */
+ void activate();
/** Set the status to Suspended. */
- void suspend(Cycles delay = Cycles(0));
+ void suspend();
/** Set the status to Halted. */
- void halt(Cycles delay = Cycles(0));
+ void halt();
/** Takes over execution of a thread from another CPU. */
void takeOverFrom(ThreadContext *old_context);
@@ -279,8 +278,8 @@
int flattenMiscIndex(int reg)
{ return cpu->isa[thread->threadId()]->flattenMiscIndex(reg); }
- void activateContext(Cycles delay)
- { cpu->activateContext(thread->threadId(), delay); }
+ void activateContext()
+ { cpu->activateContext(thread->threadId()); }
void deallocateContext()
{ cpu->deallocateContext(thread->threadId()); }
diff -r 3819b85ff21a -r a9023811bf9e src/cpu/kvm/base.cc
--- a/src/cpu/kvm/base.cc Sat Sep 20 17:18:33 2014 -0400
+++ b/src/cpu/kvm/base.cc Sat Sep 20 17:18:35 2014 -0400
@@ -430,9 +430,9 @@
}
void
-BaseKvmCPU::activateContext(ThreadID thread_num, Cycles delay)
+BaseKvmCPU::activateContext(ThreadID thread_num)
{
- DPRINTF(Kvm, "ActivateContext %d (%d cycles)\n", thread_num, delay);
+ DPRINTF(Kvm, "ActivateContext %d\n", thread_num);
assert(thread_num == 0);
assert(thread);
@@ -442,7 +442,7 @@
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