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(Updated Oct. 8, 2014, 7:42 a.m.) Review request for Default. Repository: gem5 Description (updated) ------- Changeset 10455:2728bdbacb0d --------------------------- arch: Use shared_ptr for all Faults This patch takes quite a large step in transitioning from the ad-hoc RefCountingPtr to the c++11 shared_ptr by adopting its use for all Faults. There are no changes in behaviour, and the code modifications are mostly just replacing "new" with "make_shared". Diffs (updated) ----- src/arch/alpha/ev5.cc 148b96b7bc77 src/arch/alpha/faults.hh 148b96b7bc77 src/arch/alpha/interrupts.hh 148b96b7bc77 src/arch/alpha/isa/decoder.isa 148b96b7bc77 src/arch/alpha/isa/fp.isa 148b96b7bc77 src/arch/alpha/isa/opcdec.isa 148b96b7bc77 src/arch/alpha/isa/unimp.isa 148b96b7bc77 src/arch/alpha/isa/unknown.isa 148b96b7bc77 src/arch/alpha/tlb.hh 148b96b7bc77 src/arch/alpha/tlb.cc 148b96b7bc77 src/arch/arm/insts/static_inst.hh 148b96b7bc77 src/arch/arm/interrupts.hh 148b96b7bc77 src/arch/arm/isa/formats/breakpoint.isa 148b96b7bc77 src/arch/arm/isa/formats/unimp.isa 148b96b7bc77 src/arch/arm/isa/insts/branch.isa 148b96b7bc77 src/arch/arm/isa/insts/branch64.isa 148b96b7bc77 src/arch/arm/isa/insts/data64.isa 148b96b7bc77 src/arch/arm/isa/insts/fp.isa 148b96b7bc77 src/arch/arm/isa/insts/macromem.isa 148b96b7bc77 src/arch/arm/isa/insts/misc.isa 148b96b7bc77 src/arch/arm/isa/insts/misc64.isa 148b96b7bc77 src/arch/arm/isa/insts/neon.isa 148b96b7bc77 src/arch/arm/isa/insts/neon64.isa 148b96b7bc77 src/arch/arm/isa/insts/neon64_mem.isa 148b96b7bc77 src/arch/arm/isa/insts/swap.isa 148b96b7bc77 src/arch/arm/isa/templates/mem64.isa 148b96b7bc77 src/arch/arm/isa/templates/neon.isa 148b96b7bc77 src/arch/arm/isa/templates/vfp.isa 148b96b7bc77 src/arch/arm/table_walker.hh 148b96b7bc77 src/arch/arm/table_walker.cc 148b96b7bc77 src/arch/arm/tlb.hh 148b96b7bc77 src/arch/arm/tlb.cc 148b96b7bc77 src/arch/arm/utility.cc 148b96b7bc77 src/arch/generic/memhelpers.hh 148b96b7bc77 src/arch/mips/interrupts.cc 148b96b7bc77 src/arch/mips/isa.hh 148b96b7bc77 src/arch/mips/isa/decoder.isa 148b96b7bc77 src/arch/mips/isa/formats/control.isa 148b96b7bc77 src/arch/mips/isa/formats/dsp.isa 148b96b7bc77 src/arch/mips/isa/formats/fp.isa 148b96b7bc77 src/arch/mips/isa/formats/int.isa 148b96b7bc77 src/arch/mips/isa/formats/mt.isa 148b96b7bc77 src/arch/mips/isa/formats/trap.isa 148b96b7bc77 src/arch/mips/isa/formats/unimp.isa 148b96b7bc77 src/arch/mips/isa/formats/unknown.isa 148b96b7bc77 src/arch/mips/mt.hh 148b96b7bc77 src/arch/mips/tlb.hh 148b96b7bc77 src/arch/power/isa/formats/unimp.isa 148b96b7bc77 src/arch/power/isa/formats/unknown.isa 148b96b7bc77 src/arch/power/tlb.hh 148b96b7bc77 src/arch/power/tlb.cc 148b96b7bc77 src/arch/sparc/interrupts.hh 148b96b7bc77 src/arch/sparc/isa/base.isa 148b96b7bc77 src/arch/sparc/isa/decoder.isa 148b96b7bc77 src/arch/sparc/isa/formats/mem/util.isa 148b96b7bc77 src/arch/sparc/isa/formats/priv.isa 148b96b7bc77 src/arch/sparc/isa/formats/trap.isa 148b96b7bc77 src/arch/sparc/isa/formats/unknown.isa 148b96b7bc77 src/arch/sparc/tlb.hh 148b96b7bc77 src/arch/sparc/tlb.cc 148b96b7bc77 src/arch/sparc/utility.hh 148b96b7bc77 src/arch/sparc/utility.cc 148b96b7bc77 src/arch/x86/interrupts.cc 148b96b7bc77 src/arch/x86/isa/formats/string.isa 148b96b7bc77 src/arch/x86/isa/formats/unknown.isa 148b96b7bc77 src/arch/x86/isa/insts/general_purpose/compare_and_test/bounds.py 148b96b7bc77 src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py 148b96b7bc77 src/arch/x86/isa/insts/general_purpose/control_transfer/jump.py 148b96b7bc77 src/arch/x86/isa/insts/system/undefined_operation.py 148b96b7bc77 src/arch/x86/isa/insts/x87/arithmetic/addition.py 148b96b7bc77 src/arch/x86/isa/insts/x87/arithmetic/subtraction.py 148b96b7bc77 src/arch/x86/isa/insts/x87/data_transfer_and_conversion/exchange.py 148b96b7bc77 src/arch/x86/isa/microops/debug.isa 148b96b7bc77 src/arch/x86/isa/microops/regop.isa 148b96b7bc77 src/arch/x86/memhelpers.hh 148b96b7bc77 src/arch/x86/pagetable_walker.cc 148b96b7bc77 src/arch/x86/tlb.hh 148b96b7bc77 src/arch/x86/tlb.cc 148b96b7bc77 src/arch/x86/vtophys.cc 148b96b7bc77 src/base/types.hh 148b96b7bc77 src/cpu/base_dyn_inst.hh 148b96b7bc77 src/cpu/exec_context.hh 148b96b7bc77 src/cpu/inorder/inorder_dyn_inst.hh 148b96b7bc77 src/cpu/inorder/inorder_dyn_inst.cc 148b96b7bc77 src/cpu/o3/dyn_inst_impl.hh 148b96b7bc77 src/cpu/o3/lsq_unit.hh 148b96b7bc77 src/cpu/o3/lsq_unit_impl.hh 148b96b7bc77 src/cpu/static_inst.hh 148b96b7bc77 src/sim/fault_fwd.hh 148b96b7bc77 src/sim/faults.hh 148b96b7bc77 src/sim/tlb.hh 148b96b7bc77 Diff: http://reviews.gem5.org/r/2447/diff/ Testing ------- Thanks, Andreas Hansson _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
