> On Oct. 27, 2014, 3:54 p.m., Ali Saidi wrote: > > src/mem/ruby/system/RubyMemoryControl.cc, line 677 > > <http://reviews.gem5.org/r/2468/diff/2/?file=42437#file42437line677> > > > > is this change supposed to be in here?
Yes, I experienced deadlocks in this line while draining. Suppose a store request missed in the cache and was scheduled in the memory controller. Then, the drain signal gets trigeered and the memory controller deschedules all the events (including the store request). However, the LSQ will never get drained because is waiting for the memory controller to answer a request that was just discarded. - Alberto Javier ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2468/#review5431 ----------------------------------------------------------- On Oct. 26, 2014, 5:16 p.m., Alberto Javier Naranjo Carmona wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2468/ > ----------------------------------------------------------- > > (Updated Oct. 26, 2014, 5:16 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > This patch solves some bugs that occured when using the option > --repeat-switch, in particular when switching from O3 to timing model > (deadlocks while draining and assert(!memReq) in drainSanityCheck()). See the > following thread for more info > http://www.mail-archive.com/gem5-users%40gem5.org/msg10631.html > > > Diffs > ----- > > src/cpu/o3/fetch_impl.hh PRE-CREATION > src/cpu/o3/lsq_impl.hh PRE-CREATION > src/cpu/o3/lsq_unit.hh PRE-CREATION > src/mem/ruby/system/RubyMemoryControl.cc PRE-CREATION > > Diff: http://reviews.gem5.org/r/2468/diff/ > > > Testing > ------- > > All long regression tests passed. tsunami-switcheroo-full passed. > > > Thanks, > > Alberto Javier Naranjo Carmona > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
