> On Nov. 18, 2014, 3:32 p.m., Nilay Vaish wrote:
> > src/mem/packet.hh, line 860
> > <http://reviews.gem5.org/r/2491/diff/1/?file=42506#file42506line860>
> >
> >     I think we can keep the function name as getPtr() and rely on the 
> > compiler to pick the right version.  Also how about const_cast<T*> instead 
> > of C style casting?
> 
> Andreas Hansson wrote:
>     I'd actually prefer it to be explicit at this point if you don't mind. I 
> has helped me figure out where we should be using const but cannot due to the 
> way read/write is part of the same function, but with a bool is_read (which 
> is currently done in a lot of devices for example).

As you like it.


- Nilay


-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.gem5.org/r/2491/#review5467
-----------------------------------------------------------


On Nov. 17, 2014, 6:13 a.m., Andreas Hansson wrote:
> 
> -----------------------------------------------------------
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/2491/
> -----------------------------------------------------------
> 
> (Updated Nov. 17, 2014, 6:13 a.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> -------
> 
> Changeset 10541:d68e4d58597b
> ---------------------------
> mem: Add const getters for write packet data
> 
> This patch takes a first step in tightening up how we use the data
> pointer in write packets. A const getter is added for the pointer
> itself (getConstPtr), and a number of member functions are also made
> const accordingly. In a range of places throughout the memory system
> the new member is used.
> 
> 
> Diffs
> -----
> 
>   src/cpu/inorder/resources/cache_unit.cc 1a9e235cab09 
>   src/cpu/inorder/resources/fetch_unit.cc 1a9e235cab09 
>   src/cpu/minor/execute.cc 1a9e235cab09 
>   src/cpu/minor/lsq.cc 1a9e235cab09 
>   src/cpu/o3/fetch_impl.hh 1a9e235cab09 
>   src/cpu/simple/atomic.cc 1a9e235cab09 
>   src/cpu/testers/memtest/memtest.cc 1a9e235cab09 
>   src/cpu/testers/rubytest/Check.cc 1a9e235cab09 
>   src/mem/abstract_mem.cc 1a9e235cab09 
>   src/mem/cache/cache.hh 1a9e235cab09 
>   src/mem/cache/cache_impl.hh 1a9e235cab09 
>   src/mem/external_slave.cc 1a9e235cab09 
>   src/mem/packet.hh 1a9e235cab09 
>   src/mem/packet.cc 1a9e235cab09 
>   src/mem/packet_access.hh 1a9e235cab09 
>   src/mem/ruby/common/DataBlock.hh 1a9e235cab09 
>   src/mem/ruby/common/DataBlock.cc 1a9e235cab09 
>   src/mem/ruby/slicc_interface/RubyRequest.cc 1a9e235cab09 
>   src/mem/ruby/slicc_interface/RubySlicc_Util.hh 1a9e235cab09 
>   src/mem/ruby/system/Sequencer.cc 1a9e235cab09 
> 
> Diff: http://reviews.gem5.org/r/2491/diff/
> 
> 
> Testing
> -------
> 
> 
> Thanks,
> 
> Andreas Hansson
> 
>

_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev

Reply via email to