> On Nov. 18, 2014, 10:43 p.m., Gabe Black wrote: > > util/m5/m5ops.h, line 57 > > <http://reviews.gem5.org/r/2313/diff/4/?file=42082#file42082line57> > > > > Why do we need psuedo ops for syscalls when there are actual syscall > > instructions? The same goes for page faults. I'm not saying I know that we > > don't, I'm just surprised that that would be necessary. > > > > It seems unlikely that a program is going to realize it's about to > > cause a pagefault and obligingly call a special instruction first.
The problem is that KVM doesn't normally intercept syscalls. This means that they need a small syscall handler and fault handler stub to support SE mode in KVM (see RB #2322). There are other ways of communicating with the host (e.g., IO ports, hypervisor calls). The beauty of this solution is that it is supported seamlessly by the simulated CPUs, which makes it possible to do CPU switching reliably (we need to handle situation where the switch takes place while the stub code is executing). It should be fairly straight forward to extend this to simulated CPUs, making mixed FS/SE mode simulation possible. > On Nov. 18, 2014, 10:43 p.m., Gabe Black wrote: > > src/arch/x86/pseudo_inst.hh, line 37 > > <http://reviews.gem5.org/r/2313/diff/4/?file=42075#file42075line37> > > > > These should be camel case, not all lower case. ie. m5Syscall and > > m5PageFault, depending on what you consider the boundary between words. > > These should also be called gem5*. I'd argue that we should stay with m5* in this case since the rest of the functions that are gem5-specific in the pseudo-inst interface is using that prefix. Having said that, we should probably rename them all at some point. - Andreas ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2313/#review5480 ----------------------------------------------------------- On Sept. 30, 2014, 5:21 p.m., Alexandru Dutu wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2313/ > ----------------------------------------------------------- > > (Updated Sept. 30, 2014, 5:21 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 10421:d4162e1b1c56 > --------------------------- > kvm, x86: Adding support for SE mode execution > This patch adds methods in KvmCPU model to handle KVM exits caused by syscall > instructions and page faults. These types of exits will be encountered if > KvmCPU is run in SE mode. > > > Diffs > ----- > > src/SConscript 28b31101d9e6e5e75d04448451986d6318383f3c > src/arch/SConscript 28b31101d9e6e5e75d04448451986d6318383f3c > src/arch/alpha/SConscript 28b31101d9e6e5e75d04448451986d6318383f3c > src/arch/arm/SConscript 28b31101d9e6e5e75d04448451986d6318383f3c > src/arch/arm/pseudo_inst.hh PRE-CREATION > src/arch/arm/pseudo_inst.cc PRE-CREATION > src/arch/mips/SConscript 28b31101d9e6e5e75d04448451986d6318383f3c > src/arch/power/SConscript 28b31101d9e6e5e75d04448451986d6318383f3c > src/arch/sparc/SConscript 28b31101d9e6e5e75d04448451986d6318383f3c > src/arch/x86/SConscript 28b31101d9e6e5e75d04448451986d6318383f3c > src/arch/x86/pseudo_inst.hh PRE-CREATION > src/arch/x86/pseudo_inst.cc PRE-CREATION > src/arch/x86/tlb.cc 28b31101d9e6e5e75d04448451986d6318383f3c > src/arch/x86/utility.cc 28b31101d9e6e5e75d04448451986d6318383f3c > src/cpu/kvm/base.cc 28b31101d9e6e5e75d04448451986d6318383f3c > src/sim/pseudo_inst.cc 28b31101d9e6e5e75d04448451986d6318383f3c > src/sim/system.cc 28b31101d9e6e5e75d04448451986d6318383f3c > util/m5/m5ops.h 28b31101d9e6e5e75d04448451986d6318383f3c > > Diff: http://reviews.gem5.org/r/2313/diff/ > > > Testing > ------- > > Quick regressions passed. > > > Thanks, > > Alexandru Dutu > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
