Hi Ali, Yeah I think it is partially there. The controller could capture memInvalidate and see that as the timing -> atomic switch, although I¹d say it is a bit of a hack. For the other way round I do not think there are any such calls though. Perhaps the most sensible would be to have a virtual changeMemoryMode method on the SimObject and that way inform every object about the change?
Andreas On 29/11/2014 03:49, "Ali Saidi via gem5-dev" <gem5-dev@gem5.org> wrote: >There are functions that correspond to this functionality although >they¹re poorly named for the purpose, but memWriteback() -> beginning of >KVM simulation; memInvalidate -> end of KVM simulation. Another option >would be to check for the memory time atomic_noncaching which I believe >only KVM uses. > >Ali > >On Nov 27, 2014, at 2:33 AM, Andreas Hansson via gem5-dev ><gem5-dev@gem5.org> wrote: > >> Hi Alex, >> >> Oh I was not suggesting you on your own should solve it, I merely think >>we >> cannot just ignore the issue. >> >> I think the first thing is to establish an API around the switching of >>the >> mode. I am happy to make the changes needed to the controller once we >>have >> worked out the switching. >> >> Andreas >> >> On 11/26/14, 9:49 PM, "Dutu, Alexandru via gem5-dev" <gem5-dev@gem5.org> >> wrote: >> >>> Hi Andreas, >>> >>> Sorry for the late reply, I have missed your email. I will investigate >>> more the issues with memory controller refresh events and let you know >>> what I find out. >>> >>> Best regards, >>> Alex >>> _______________________________________________ >>> gem5-dev mailing list >>> gem5-dev@gem5.org >>> http://m5sim.org/mailman/listinfo/gem5-dev >>> >> >> >> -- IMPORTANT NOTICE: The contents of this email and any attachments are >>confidential and may also be privileged. If you are not the intended >>recipient, please notify the sender immediately and do not disclose the >>contents to any other person, use it for any purpose, or store or copy >>the information in any medium. Thank you. >> >> ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, >>Registered in England & Wales, Company No: 2557590 >> ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 >>9NJ, Registered in England & Wales, Company No: 2548782 >> >> _______________________________________________ >> gem5-dev mailing list >> gem5-dev@gem5.org >> http://m5sim.org/mailman/listinfo/gem5-dev >> > >_______________________________________________ >gem5-dev mailing list >gem5-dev@gem5.org >http://m5sim.org/mailman/listinfo/gem5-dev > -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2557590 ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2548782 _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
