I've been going through some of the activity on gem5-dev in reverse (as you
may have noticed :-)). This proposal seems very reasonable to me. But
someone more knowledgeable on the InOrder model and the related ISAs should
speak up.
Thanks,
Marc

On Wed, Dec 17, 2014 at 7:59 AM, Andreas Hansson via gem5-dev <
[email protected]> wrote:

> Hi all,
>
> Given that the InOrderCPU is causing confusion, and only ever compiled for
> MIPS and SPARC, how would people feel about:
>
> 1) Go ahead and remove the two regressions using the model, and also stop
> compiling it for MIPS and SPARC. This could be done in the next few weeks
> if no one objects. If someone really wants to use MIPS and SPARC in-order
> cores I would argue the best path forward is to add support for a branch
> delay slot to the MinorCPU.
>
> 2) Prune the actual InOrderCPU code early Q1 2015.
>
> 3) Rename MinorCPU -> InOrderCPU shortly after (2).
>
> Thoughts around this timeline?
>
> Andreas
>
> On 17/12/2014 15:11, "Ali Saidi via gem5-dev" <[email protected]> wrote:
>
> >
> >The in-order cpu model is deprecated and will soon be removed from the
> >tree. Id you'd like an in order cpu model use the minor cpu model which
> >supports ARM.
> >
> >Ali
> >
> >
> >Sent from my ARM powered mobile device
> >
> >> On Dec 17, 2014, at 2:18 PM, Anastasiia via gem5-dev
> >><[email protected]> wrote:
> >>
> >> Hi,
> >>
> >> I try to run the ARM in-order cpu and it still does not work.
> >> Is anyone working on this since 2012?
> >>
> >> Thank you
> >>
> >> Regards
> >>
> >>
> >>
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