changeset 9ba5e70964a4 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=9ba5e70964a4
description:
mem: Tidy up the cache debug messages
Avoid redundant inclusion of the name in the DPRINTF string.
diffstat:
src/mem/cache/base.cc | 10 +++++-----
src/mem/cache/base.hh | 3 ++-
src/mem/cache/cache_impl.hh | 7 +++----
3 files changed, 10 insertions(+), 10 deletions(-)
diffs (80 lines):
diff -r eddb533708cb -r 9ba5e70964a4 src/mem/cache/base.cc
--- a/src/mem/cache/base.cc Mon Mar 02 04:00:35 2015 -0500
+++ b/src/mem/cache/base.cc Mon Mar 02 04:00:37 2015 -0500
@@ -92,13 +92,13 @@
BaseCache::CacheSlavePort::setBlocked()
{
assert(!blocked);
- DPRINTF(CachePort, "Cache port %s blocking new requests\n", name());
+ DPRINTF(CachePort, "Port is blocking new requests\n");
blocked = true;
// if we already scheduled a retry in this cycle, but it has not yet
// happened, cancel it
if (sendRetryEvent.scheduled()) {
owner.deschedule(sendRetryEvent);
- DPRINTF(CachePort, "Cache port %s deschedule retry\n", name());
+ DPRINTF(CachePort, "Port descheduled retry\n");
mustSendRetry = true;
}
}
@@ -107,10 +107,10 @@
BaseCache::CacheSlavePort::clearBlocked()
{
assert(blocked);
- DPRINTF(CachePort, "Cache port %s accepting new requests\n", name());
+ DPRINTF(CachePort, "Port is accepting new requests\n");
blocked = false;
if (mustSendRetry) {
- // @TODO: need to find a better time (next bus cycle?)
+ // @TODO: need to find a better time (next cycle?)
owner.schedule(sendRetryEvent, curTick() + 1);
}
}
@@ -118,7 +118,7 @@
void
BaseCache::CacheSlavePort::processSendRetry()
{
- DPRINTF(CachePort, "Cache port %s sending retry\n", name());
+ DPRINTF(CachePort, "Port is sending retry\n");
// reset the flag and call retry
mustSendRetry = false;
diff -r eddb533708cb -r 9ba5e70964a4 src/mem/cache/base.hh
--- a/src/mem/cache/base.hh Mon Mar 02 04:00:35 2015 -0500
+++ b/src/mem/cache/base.hh Mon Mar 02 04:00:37 2015 -0500
@@ -129,7 +129,8 @@
*/
void requestBus(RequestCause cause, Tick time)
{
- DPRINTF(CachePort, "Asserting bus request for cause %d\n", cause);
+ DPRINTF(CachePort, "Scheduling request at %llu due to %d\n",
+ time, cause);
reqQueue.schedSendEvent(time);
}
diff -r eddb533708cb -r 9ba5e70964a4 src/mem/cache/cache_impl.hh
--- a/src/mem/cache/cache_impl.hh Mon Mar 02 04:00:35 2015 -0500
+++ b/src/mem/cache/cache_impl.hh Mon Mar 02 04:00:37 2015 -0500
@@ -261,8 +261,7 @@
markInServiceInternal(mshr, pending_dirty_resp);
#if 0
if (mshr->originalCmd == MemCmd::HardPFReq) {
- DPRINTF(HWPrefetch, "%s:Marking a HW_PF in service\n",
- name());
+ DPRINTF(HWPrefetch, "Marking a HW_PF in service\n");
//Also clear pending if need be
if (!prefetcher->havePending())
{
@@ -324,10 +323,10 @@
// that can modify its value.
blk = tags->accessBlock(pkt->getAddr(), pkt->isSecure(), lat, id);
- DPRINTF(Cache, "%s%s %x (%s) %s %s\n", pkt->cmdString(),
+ DPRINTF(Cache, "%s%s %x (%s) %s\n", pkt->cmdString(),
pkt->req->isInstFetch() ? " (ifetch)" : "",
pkt->getAddr(), pkt->isSecure() ? "s" : "ns",
- blk ? "hit" : "miss", blk ? blk->print() : "");
+ blk ? "hit " + blk->print() : "miss");
// Writeback handling is special case. We can write the block into
// the cache without having a writeable copy (or any copy at all).
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