> On May 14, 2015, 4:11 p.m., Stephan Diestelhorst wrote:
> >

Great idea, some comments on style and adding too many flags and 
specialisations.


- Stephan


-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.gem5.org/r/2788/#review6263
-----------------------------------------------------------


On May 11, 2015, 10:22 p.m., Tony Gutierrez wrote:
> 
> -----------------------------------------------------------
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/2788/
> -----------------------------------------------------------
> 
> (Updated May 11, 2015, 10:22 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> -------
> 
> Changeset 10845:0aa7c6802baa
> ---------------------------
> cpu: Add store-access operations
> 
> This patch was created by Bihn Pham during his internship at AMD.
> 
> This patch adds decoupled store operations that are commonly used by
> high-performance processors. The patch modifies the O3 CPU model to issue
> StoreAccess operations as soon as possible to acquire exclusive permission for
> eventual stores. Later data store operations behave as normal.
> 
> In the classic memory model, StoreAccess requests are treated as HardPFExReq
> and share the existing prefetch queue. Therefore, they affect performance only
> if the prefetcher is enabled in the classic model.
> 
> In Ruby, StoreAccess requests are treated as RubyStore with NULL data field.
> 
> 
> Diffs
> -----
> 
>   src/cpu/o3/lsq_unit.hh fbdaa08aaa426b9f4660c366f934ccb670d954ec 
>   src/cpu/o3/lsq_unit_impl.hh fbdaa08aaa426b9f4660c366f934ccb670d954ec 
>   src/mem/abstract_mem.cc fbdaa08aaa426b9f4660c366f934ccb670d954ec 
>   src/mem/cache/cache_impl.hh fbdaa08aaa426b9f4660c366f934ccb670d954ec 
>   src/mem/cache/mshr.cc fbdaa08aaa426b9f4660c366f934ccb670d954ec 
>   src/mem/cache/prefetch/queued.cc fbdaa08aaa426b9f4660c366f934ccb670d954ec 
>   src/mem/packet.hh fbdaa08aaa426b9f4660c366f934ccb670d954ec 
>   src/mem/packet.cc fbdaa08aaa426b9f4660c366f934ccb670d954ec 
>   src/mem/protocol/RubySlicc_Exports.sm 
> fbdaa08aaa426b9f4660c366f934ccb670d954ec 
>   src/mem/ruby/system/RubyPort.hh fbdaa08aaa426b9f4660c366f934ccb670d954ec 
>   src/mem/ruby/system/RubyPort.cc fbdaa08aaa426b9f4660c366f934ccb670d954ec 
>   src/mem/ruby/system/Sequencer.cc fbdaa08aaa426b9f4660c366f934ccb670d954ec 
> 
> Diff: http://reviews.gem5.org/r/2788/diff/
> 
> 
> Testing
> -------
> 
> 
> Thanks,
> 
> Tony Gutierrez
> 
>

_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev

Reply via email to