Hi Everyone, The ARM generic timer fixes and about half of the patches required for 64-bit KVM support on ARM have been setting on RB for almost two weeks now. Unless there are any outstanding issues, I'd like to push as many of these patches as possible on Friday this week.
Since I posted patches 5-8 today, I'll hold off pushing them until the end of next week (or early the week after) unless there they have at least one "ship it" each and no outstanding issues on Friday. I'm going to assume that the "old" patches (i.e., 1-4 and 9-12) are OK to go unless I hear otherwise by noon (UTC) on Friday. KVM fixes and aarch64 support: build: Don't test for KVM xsave support on ARM [RB2758, 1] kvm: Remove KvmVM APIs for in-kernel IRQ chip simulation [RB2769, 2] kvm, x86: Guard x86-specific APIs in KvmVM [RB2760, 3] kvm: Fix dumping code for large registers [RB2761, 4] kvm, arm: Move ARM-specific files to arch/arm/kvm/ [RB2833, 5] kvm, arm, dev: Add an in-kernel GIC implementation [RB2837, 6] kvm: Handle inst events at the current instruction count [RB2838, 7] kvm, arm: Add support for aarch64 [RB2839, 8] The following timer fixes add support for virtual timers (required by new Linux kernels) and a memory mapped timer model (sometimes required by KVM): dev, arm: Refactor and clean up the generic timer model [RB2762, 9] dev, arm: Add virtual timers to the generic timer model [RB2763, 10] arm: Get rid of pointless have_generic_timer param [RB2764, 11] arm, dev: Add support for a memory mapped generic timer [RB2764, 12] Thanks, Andreas [1] http://reviews.gem5.org/r/2758/ [2] http://reviews.gem5.org/r/2759/ [3] http://reviews.gem5.org/r/2760/ [4] http://reviews.gem5.org/r/2761/ [5] http://reviews.gem5.org/r/2833/ [6] http://reviews.gem5.org/r/2837/ [7] http://reviews.gem5.org/r/2838/ [8] http://reviews.gem5.org/r/2839/ [9] http://reviews.gem5.org/r/2762/ [10] http://reviews.gem5.org/r/2763/ [11] http://reviews.gem5.org/r/2764/ [12] http://reviews.gem5.org/r/2765/ -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2557590 ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2548782 _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
