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(Updated June 16, 2015, 11:15 p.m.) Review request for Default. Repository: gem5 Description (updated) ------- Changeset 10874:65214a5bb5a6 --------------------------- x86: decode instructions with vex prefix This patch updates the x86 decoder so that it can decode instructions with vex prefix. It also updates the isa with opcodes from vex opcode maps 1, 2 and 3. Note that none of the instructions have been implemented yet. The implementations would be provided in due course of time. Diffs (updated) ----- src/arch/x86/decoder.hh ebb3d0737aa7 src/arch/x86/decoder.cc ebb3d0737aa7 src/arch/x86/decoder_tables.cc ebb3d0737aa7 src/arch/x86/isa/bitfields.isa ebb3d0737aa7 src/arch/x86/isa/decoder/decoder.isa ebb3d0737aa7 src/arch/x86/isa/decoder/vex_opcodes.isa PRE-CREATION src/arch/x86/isa_traits.hh ebb3d0737aa7 src/arch/x86/types.hh ebb3d0737aa7 src/arch/x86/types.cc ebb3d0737aa7 Diff: http://reviews.gem5.org/r/2827/diff/ Testing ------- Thanks, Nilay Vaish _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
