-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.gem5.org/r/2888/
-----------------------------------------------------------

Review request for Default.


Repository: gem5


Description
-------

Changeset 10876:6e44919559f4
---------------------------
x86: reimplment SSE instructions using new vector registers

This patch removes the old xmm registers and adds new vector registers to the
x86 architecture.  SIMD instructions using xmm registers have been
reimplemented to use the new set of registers.


Diffs
-----

  src/arch/x86/SConscript ebb3d0737aa7 
  src/arch/x86/insts/microvectorop.hh PRE-CREATION 
  src/arch/x86/insts/microvectorop.cc PRE-CREATION 
  src/arch/x86/insts/static_inst.hh ebb3d0737aa7 
  src/arch/x86/insts/static_inst.cc ebb3d0737aa7 
  src/arch/x86/isa/decoder/two_byte_opcodes.isa ebb3d0737aa7 
  src/arch/x86/isa/includes.isa ebb3d0737aa7 
  src/arch/x86/isa/insts/general_purpose/data_transfer/move.py ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/floating_point/arithmetic/addition.py 
ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/floating_point/arithmetic/division.py 
ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/floating_point/arithmetic/horizontal_addition.py 
ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/floating_point/arithmetic/horizontal_subtraction.py
 ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/floating_point/arithmetic/multiplication.py 
ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/floating_point/arithmetic/simultaneous_addition_and_subtraction.py
 ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/floating_point/arithmetic/square_root.py 
ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/floating_point/arithmetic/subtraction.py 
ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_mask.py 
ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_minimum_or_maximum.py
 ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/floating_point/compare/compare_and_write_rflags.py
 ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_floating_point.py
 ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_gpr_integer.py
 ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_mmx_integer.py
 ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/floating_point/data_conversion/convert_floating_point_to_xmm_integer.py
 ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/floating_point/data_reordering/shuffle.py 
ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/floating_point/data_reordering/unpack_and_interleave.py
 ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move.py 
ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move_mask.py 
ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/floating_point/data_transfer/move_with_duplication.py
 ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/floating_point/logical/andp.py ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/floating_point/logical/exclusive_or.py 
ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/floating_point/logical/orp.py ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/integer/arithmetic/addition.py ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/integer/arithmetic/average.py ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/integer/arithmetic/multiplication.py 
ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/integer/arithmetic/multiply_add.py 
ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/integer/arithmetic/subtraction.py ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/integer/arithmetic/sum_of_absolute_differences.py
 ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/integer/compare/compare_and_write_mask.py 
ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/integer/compare/compare_and_write_minimum_or_maximum.py
 ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/integer/data_conversion/convert_gpr_integer_to_floating_point.py
 ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/integer/data_conversion/convert_integer_to_floating_point.py
 ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/integer/data_conversion/convert_mmx_integer_to_floating_point.py
 ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/integer/data_reordering/extract_and_insert.py 
ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/integer/data_reordering/pack_with_saturation.py 
ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/integer/data_reordering/shuffle.py 
ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/integer/data_reordering/unpack_and_interleave.py 
ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/integer/data_transfer/move_mask.py 
ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/integer/data_transfer/move_non_temporal.py 
ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/integer/logical/exclusive_or.py ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/integer/logical/pand.py ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/integer/logical/por.py ebb3d0737aa7 
  
src/arch/x86/isa/insts/simd128/integer/save_and_restore_state/save_and_restore_state.py
 ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/integer/shift/left_logical_shift.py 
ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/integer/shift/right_arithmetic_shift.py 
ebb3d0737aa7 
  src/arch/x86/isa/insts/simd128/integer/shift/right_logical_shift.py 
ebb3d0737aa7 
  src/arch/x86/isa/microasm.isa ebb3d0737aa7 
  src/arch/x86/isa/microops/ldstop.isa ebb3d0737aa7 
  src/arch/x86/isa/microops/mediaop.isa ebb3d0737aa7 
  src/arch/x86/isa/microops/microops.isa ebb3d0737aa7 
  src/arch/x86/isa/microops/vector-ops.isa PRE-CREATION 
  src/arch/x86/isa/operands.isa ebb3d0737aa7 
  src/arch/x86/memhelpers.hh ebb3d0737aa7 
  src/arch/x86/nativetrace.hh ebb3d0737aa7 
  src/arch/x86/nativetrace.cc ebb3d0737aa7 
  src/arch/x86/registers.hh ebb3d0737aa7 
  src/arch/x86/regs/float.hh ebb3d0737aa7 
  src/arch/x86/regs/vector.hh PRE-CREATION 
  src/arch/x86/utility.hh ebb3d0737aa7 
  src/arch/x86/utility.cc ebb3d0737aa7 
  src/arch/x86/x86_traits.hh ebb3d0737aa7 
  src/cpu/kvm/x86_cpu.cc ebb3d0737aa7 
  src/cpu/o3/O3CPU.py ebb3d0737aa7 
  src/cpu/simple_thread.hh ebb3d0737aa7 

Diff: http://reviews.gem5.org/r/2888/diff/


Testing
-------


Thanks,

Nilay Vaish

_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev

Reply via email to