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Are you assuming that physical memory size is a power of 2? - Nilay Vaish On July 14, 2015, 2:53 p.m., David Hashe wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2970/ > ----------------------------------------------------------- > > (Updated July 14, 2015, 2:53 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 10923:17785cb5a672 > --------------------------- > config: Fail if not using all L2 caches in ruby protocols > > In the MESI_Three_Level, MESI_Two_Level, MOESI_CMP_directory, and > MOESI_CMP_token protocols, if the num_l2caches option is not a power of 2, > then all cache banks above the next lowest power of 2 are not addressed and > are never used (cache bank selection takes place in mapAddressToRange within > src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping). > > This changeset adds asserts to the configuration files of the affected > protocols to make sure that num_l2caches is a power of 2. > > A related behavior is documented in > http://gem5.org/Coherence-Protocol-Independent_Memory_Components#Parameters_3, > at the bottom of the section on start_index_bit. > > > Diffs > ----- > > configs/ruby/MESI_Three_Level.py 5ee72f4b293152dd0c75ab402a49696d6903e604 > configs/ruby/MESI_Two_Level.py 5ee72f4b293152dd0c75ab402a49696d6903e604 > configs/ruby/MOESI_CMP_directory.py > 5ee72f4b293152dd0c75ab402a49696d6903e604 > configs/ruby/MOESI_CMP_token.py 5ee72f4b293152dd0c75ab402a49696d6903e604 > > Diff: http://reviews.gem5.org/r/2970/diff/ > > > Testing > ------- > > > Thanks, > > David Hashe > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
