> On July 30, 2015, 11:59 p.m., Steve Reinhardt wrote: > > so what is the difference between > > xc->getCpuPtr()->wakeup(xc->threadId()); > > and > > xc->activate(); > > ? I think we need to clarify whether or not these are equivalent, and if > > so, why we need both, and if not, what the differences are and when you > > should be using one vs. the other. > > Mitch Hayenga wrote: > From what I can tell, wakeup does more... Making sure the CPU knows to > clock itself, setting the adress monitor to reflect that a wakeup occured, > etc. In general wakeup is related to quiesce events (WFI/WFE on ARM). > Activate looks to be more just related to setting the thread to be listed as > runnable + a few statistics. Wakeup seems to call activate.
Just looking at the O3 cpu model, FullO3CPU<Impl>::wakeCPU() and FullO3CPU<Impl>::activateContext(ThreadID tid) are equivalent. Even more, it seems that FullO3CPU<Impl>::wakeup() calls both of them and schedules 2 wakeup events instead of one. It might be that I am missing something, though I will expose my understanding in a mere effort to sparkle a discussion which will clarify some hindered aspects. The intent seems to be for wakeCPU to be used whenever there is no particular hardware thread which needs to wakeup (i.e. during a drain) and activateContext when the thread to be activated is known. As far I can tell wakeup seems bogus and should be replaced with activateContext. - Alexandru ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2999/#review6865 ----------------------------------------------------------- On July 30, 2015, 6:47 p.m., Curtis Dunham wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2999/ > ----------------------------------------------------------- > > (Updated July 30, 2015, 6:47 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changes wakeup functionality so that only specific threads on SMT > capable cpus are woken. > > > Diffs > ----- > > src/mem/abstract_mem.cc 40526b73c7db9ff2e03215cdfb477d024ea8d709 > src/cpu/checker/cpu.hh 40526b73c7db9ff2e03215cdfb477d024ea8d709 > src/cpu/kvm/base.hh 40526b73c7db9ff2e03215cdfb477d024ea8d709 > src/cpu/kvm/base.cc 40526b73c7db9ff2e03215cdfb477d024ea8d709 > src/cpu/minor/cpu.hh 40526b73c7db9ff2e03215cdfb477d024ea8d709 > src/cpu/minor/cpu.cc 40526b73c7db9ff2e03215cdfb477d024ea8d709 > src/cpu/o3/cpu.hh 40526b73c7db9ff2e03215cdfb477d024ea8d709 > src/cpu/o3/cpu.cc 40526b73c7db9ff2e03215cdfb477d024ea8d709 > src/cpu/simple/atomic.cc 40526b73c7db9ff2e03215cdfb477d024ea8d709 > src/cpu/simple/base.hh 40526b73c7db9ff2e03215cdfb477d024ea8d709 > src/cpu/simple/base.cc 40526b73c7db9ff2e03215cdfb477d024ea8d709 > src/cpu/simple/timing.cc 40526b73c7db9ff2e03215cdfb477d024ea8d709 > src/arch/x86/interrupts.cc 40526b73c7db9ff2e03215cdfb477d024ea8d709 > src/cpu/base.hh 40526b73c7db9ff2e03215cdfb477d024ea8d709 > src/arch/arm/locked_mem.hh 40526b73c7db9ff2e03215cdfb477d024ea8d709 > src/arch/null/cpu_dummy.hh 40526b73c7db9ff2e03215cdfb477d024ea8d709 > > Diff: http://reviews.gem5.org/r/2999/diff/ > > > Testing > ------- > > > Thanks, > > Curtis Dunham > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
