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This is a major change to the memory system, and I find the description rather 
misleading. It would be good to get some more examples, and make sure that this 
works as a general solution for "in-memory-system operations". What are the 
assumptions? Cache line sized only? What is the relation between packets and 
these requests?

Also, is there a specific reason why you have opted for the crazily generic 
functor, as opposed to hard-coding the supported functions?

I'd like to also understand how this relates to something like ARM v8.1 far 
atomics (and answers to the questions above would help tremendously with that).


src/mem/request.hh (line 717)
<http://reviews.gem5.org/r/3205/#comment6701>

    Why? That seems very odd


- Andreas Hansson


On Dec. 23, 2015, 6:34 p.m., Tony Gutierrez wrote:
> 
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> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3205/
> -----------------------------------------------------------
> 
> (Updated Dec. 23, 2015, 6:34 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> -------
> 
> Changeset 11279:ea817032d082
> ---------------------------
> mem: support for gpu-style RMWs in ruby
> 
> This patch adds support for GPU-style read-modify-write (RMW) operations in
> ruby. Such atomic operations are traditionally executed at the memory 
> controller
> (instead of through an L1 cache using cache-line locking).
> 
> Currently, this patch works by propogating operation functors through the 
> memory
> system.
> 
> 
> Diffs
> -----
> 
>   src/mem/request.hh d9a0136ab8cc4b3cf4821d064140b857e60db0dd 
>   src/mem/protocol/RubySlicc_Exports.sm 
> d9a0136ab8cc4b3cf4821d064140b857e60db0dd 
>   src/mem/packet.hh d9a0136ab8cc4b3cf4821d064140b857e60db0dd 
>   src/mem/abstract_mem.cc d9a0136ab8cc4b3cf4821d064140b857e60db0dd 
>   src/base/types.hh d9a0136ab8cc4b3cf4821d064140b857e60db0dd 
> 
> Diff: http://reviews.gem5.org/r/3205/diff/
> 
> 
> Testing
> -------
> 
> 
> Thanks,
> 
> Tony Gutierrez
> 
>

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