----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3342/ -----------------------------------------------------------
Review request for Default. Repository: gem5 Description ------- mem: Remove threadId from memory request class In general, the ThreadID parameter is unnecessary in the memory system as the ContextID is what is used for the purposes of locks/wakeups. Since we allocate sequential ContextIDs for each thread on MT-enabled CPUs, ThreadID is unnecessary as the CPUs can identify the requesting thread through sideband info (SenderState / LSQ entries) or ContextID offset from the base ContextID for a cpu. Diffs ----- ext/sst/ExtMaster.cc ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/arch/arm/isa.cc ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/arch/arm/vtophys.cc ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/cpu/base.hh ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/cpu/base_dyn_inst.hh ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/cpu/checker/cpu.cc ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/cpu/checker/cpu_impl.hh ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/cpu/kvm/base.cc ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/cpu/kvm/x86_cpu.cc ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/cpu/minor/fetch1.cc ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/cpu/minor/lsq.cc ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/cpu/o3/fetch_impl.hh ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/cpu/o3/lsq.hh ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/cpu/o3/lsq_impl.hh ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/cpu/simple/atomic.cc ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/cpu/simple/timing.cc ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/cpu/testers/memtest/memtest.cc ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/cpu/testers/networktest/networktest.cc ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/cpu/testers/rubytest/Check.cc ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/cpu/trace/trace_cpu.cc ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/mem/cache/prefetch/queued.cc ef6e57ac0d708aff0af51c77ff0aee2c069993cf src/mem/request.hh ef6e57ac0d708aff0af51c77ff0aee2c069993cf Diff: http://reviews.gem5.org/r/3342/diff/ Testing ------- Thanks, Curtis Dunham _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
