changeset 8e14075966d0 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=8e14075966d0
description:
arm: Use the target EL state when determining fault format
We currently check the current state instead of the state of the
target EL when determining how we report a fault. This breaks
interprocessing since EL0 in aarch32 would report its fault status
using the aarch32 registers even if EL1 is in aarch64. Fix this to
report the fault using the format of the target EL.
Change-Id: Ic080267ac210783d1e01c722a4ddaa687dce280e
Signed-off-by: Andreas Sandberg <[email protected]>
Reviewed-by: Mitch Hayenga <[email protected]>
diffstat:
src/arch/arm/faults.cc | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diffs (19 lines):
diff -r 1f04f97c014d -r 8e14075966d0 src/arch/arm/faults.cc
--- a/src/arch/arm/faults.cc Thu May 26 17:38:15 2016 +0100
+++ b/src/arch/arm/faults.cc Fri May 27 15:02:01 2016 +0100
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2010, 2012-2014 ARM Limited
+ * Copyright (c) 2010, 2012-2014, 2016 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -948,7 +948,7 @@
// try to set hsr etc. and are based upon source!
ArmFaultVals<T>::invoke(tc, inst);
- if (cpsr.width) { // AArch32
+ if (!this->to64) { // AArch32
if (cpsr.mode == MODE_HYP) {
tc->setMiscReg(T::HFarIndex, faultAddr);
} else if (stage2) {
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