changeset bd67524751ee in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=bd67524751ee
description:
misc: Clean up and complete the gem5<->SystemC-TLM bridge [2/10]
The current TLM bridge only provides a Slave Port that allows the gem5
world to send request to the SystemC world. This patch series refractors
and cleans up the existing code, and adds a Master Port that allows the
SystemC world to send requests to the gem5 world.
This patch:
* Add the Master Port. Add an example application that isslustrates
its
* use.
Testing Done: A simple example application consisting of a TLM traffic
generator and a gem5 memory is part of the patch.
Reviewed at http://reviews.gem5.org/r/3528/
Signed-off-by: Jason Lowe-Power <[email protected]>
diffstat:
util/tlm/examples/master_port/SConstruct | 77 ++++
util/tlm/examples/master_port/main.cc | 98 +++++
util/tlm/examples/master_port/tlm.py | 75 ++++
util/tlm/examples/master_port/traffic_generator.cc | 154 ++++++++
util/tlm/examples/master_port/traffic_generator.hh | 77 ++++
util/tlm/sc_master_port.cc | 362 +++++++++++++++++++++
util/tlm/sc_master_port.hh | 137 +++++++
util/tlm/sim_control.cc | 2 +
8 files changed, 982 insertions(+), 0 deletions(-)
diffs (truncated from 1027 to 300 lines):
diff -r f12963cb9dc2 -r bd67524751ee util/tlm/examples/master_port/SConstruct
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/util/tlm/examples/master_port/SConstruct Thu Feb 09 19:15:33 2017 -0500
@@ -0,0 +1,77 @@
+#!python
+
+# Copyright (c) 2016, Dresden University of Technology (TU Dresden)
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+# this list of conditions and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# 3. Neither the name of the copyright holder nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+# OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Christian Menard
+
+import os
+
+gem5_arch = 'ARM'
+gem5_variant = 'opt'
+#gem5_variant = 'debug'
+
+gem5_root = '#../../../..'
+
+target = 'gem5.' + gem5_variant + '.sc'
+
+env = Environment()
+
+# Import PKG_CONFIG_PATH from the external environment
+if os.environ.has_key('PKG_CONFIG_PATH'):
+ env['ENV']['PKG_CONFIG_PATH'] = os.environ['PKG_CONFIG_PATH']
+
+# search for SystemC
+env.ParseConfig('pkg-config --cflags --libs systemc')
+
+# add include dirs
+env.Append(CPPPATH=[gem5_root + '/build/' + gem5_arch,
+ gem5_root + '/util/systemc',
+ gem5_root + '/util/tlm'])
+
+env.Append(LIBS=['gem5_' + gem5_variant])
+env.Append(LIBPATH=[gem5_root + '/build/' + gem5_arch])
+
+env.Append(CXXFLAGS=['-std=c++11',
+ '-DSC_INCLUDE_DYNAMIC_PROCESSES',
+ '-DTRACING_ON'])
+
+if gem5_variant == 'debug':
+ env.Append(CXXFLAGS=['-g', '-DDEBUG'])
+
+src_systemc = [gem5_root + '/util/systemc/sc_gem5_control.cc',
+ gem5_root + '/util/systemc/sc_logger.cc',
+ gem5_root + '/util/systemc/sc_module.cc',
+ gem5_root + '/util/systemc/stats.cc']
+
+src_tlm = Glob(gem5_root + '/util/tlm/*.cc')
+src_main = Glob('*.cc')
+
+main = env.Program(target, src_systemc + src_tlm + src_main)
diff -r f12963cb9dc2 -r bd67524751ee util/tlm/examples/master_port/main.cc
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/util/tlm/examples/master_port/main.cc Thu Feb 09 19:15:33 2017 -0500
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2016, Dresden University of Technology (TU Dresden)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Christian Menard
+ */
+
+#include <systemc>
+#include <tlm>
+
+#include "sc_master_port.hh"
+#include "sim_control.hh"
+#include "stats.hh"
+#include "traffic_generator.hh"
+
+// Defining global string variable decalred in stats.hh
+std::string filename;
+
+void
+reportHandler(const sc_core::sc_report& report,
+ const sc_core::sc_actions& actions)
+{
+ uint64_t systemc_time = report.get_time().value();
+ uint64_t gem5_time = curTick();
+
+ std::cerr << report.get_time();
+
+ if (gem5_time < systemc_time) {
+ std::cerr << " (<) ";
+ } else if (gem5_time > systemc_time) {
+ std::cerr << " (!) ";
+ } else {
+ std::cerr << " (=) ";
+ }
+
+ std::cerr << ": " << report.get_msg_type() << ' ' << report.get_msg()
+ << '\n';
+}
+
+int
+sc_main(int argc, char** argv)
+{
+ sc_core::sc_report_handler::set_handler(reportHandler);
+
+ SimControl simControl("gem5", argc, argv);
+ TrafficGenerator trafficGenerator("traffic_generator");
+
+ filename = "m5out/stats-systemc.txt";
+
+ tlm::tlm_target_socket<>* mem_port =
+ dynamic_cast<tlm::tlm_target_socket<>*>(
+ sc_core::sc_find_object("gem5.memory"));
+
+ if (mem_port) {
+ SC_REPORT_INFO("sc_main", "Port Found");
+ trafficGenerator.socket.bind(*mem_port);
+ } else {
+ SC_REPORT_FATAL("sc_main", "Port Not Found");
+ std::exit(EXIT_FAILURE);
+ }
+
+ std::cout << "Starting sc_main" << std::endl;
+
+ sc_core::sc_start(); // Run to end of simulation
+
+ SC_REPORT_INFO("sc_main", "End of Simulation");
+
+ CxxConfig::statsDump();
+
+ return EXIT_SUCCESS;
+}
diff -r f12963cb9dc2 -r bd67524751ee util/tlm/examples/master_port/tlm.py
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/util/tlm/examples/master_port/tlm.py Thu Feb 09 19:15:33 2017 -0500
@@ -0,0 +1,75 @@
+#
+# Copyright (c) 2016, Dresden University of Technology (TU Dresden)
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+# this list of conditions and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# 3. Neither the name of the copyright holder nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+# OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Christian Menard
+#
+
+import m5
+from m5.objects import *
+
+import os
+
+# Base System Architecture:
+# +-----+ ^
+# | TLM | | TLM World
+# +--+--+ | (see main.cc)
+# | v
+# +----------v-----------+ External Port (see sc_master_port.*)
+# | Membus | ^
+# +----------+-----------+ |
+# | | gem5 World
+# +---v----+ |
+# | Memory | |
+# +--------+ v
+#
+
+# Create a system with a Crossbar and a simple Memory:
+system = System()
+system.membus = IOXBar(width = 16)
+system.physmem = SimpleMemory(range = AddrRange('512MB'))
+system.clk_domain = SrcClockDomain(clock = '1.5GHz',
+ voltage_domain = VoltageDomain(voltage = '1V'))
+
+# Create a external TLM port:
+system.tlm = ExternalMaster()
+system.tlm.port_type = "tlm_master"
+system.tlm.port_data = "memory"
+
+# Route the connections:
+system.system_port = system.membus.slave
+system.physmem.port = system.membus.master
+system.tlm.port = system.membus.slave
+system.mem_mode = 'timing'
+
+# Start the simulation:
+root = Root(full_system = False, system = system)
+m5.instantiate()
+m5.simulate()
diff -r f12963cb9dc2 -r bd67524751ee
util/tlm/examples/master_port/traffic_generator.cc
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/util/tlm/examples/master_port/traffic_generator.cc Thu Feb 09
19:15:33 2017 -0500
@@ -0,0 +1,154 @@
+/*
+ * Copyright (c) 2016, Dresden University of Technology (TU Dresden)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Christian Menard
+ */
+
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