Andreas Sandberg has uploaded this change for review. (
https://gem5-review.googlesource.com/4285
Change subject: arch-arm: Only increment SW PMU counters on writes to
PMSWINC
......................................................................
arch-arm: Only increment SW PMU counters on writes to PMSWINC
When writing a bitmask of counters to PMSWINC, the PMU currently
increments the corresponding counters regardless of what they are
configured to count. According to the ARM ARM (D5.10.4), counters
should only be updated if they have been configured to count
software events (event type 0).
Change-Id: I5b2bc1fae55faa342b863721c9838342442831a9
Reviewed-by: Andreas Sandberg <andreas.sandb...@arm.com>
---
M src/arch/arm/pmu.cc
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/arch/arm/pmu.cc b/src/arch/arm/pmu.cc
index 14b1b50..f1ff6cb 100644
--- a/src/arch/arm/pmu.cc
+++ b/src/arch/arm/pmu.cc
@@ -147,8 +147,10 @@
case MISCREG_PMSWINC:
for (int i = 0; i < counters.size(); ++i) {
CounterState &ctr(getCounter(i));
- if (ctr.enabled && (val & (1 << i)))
+ if (ctr.enabled && (val & (1 << i))
+ && ctr.eventId == ARCH_EVENT_SW_INCR ) {
++ctr.value;
+ }
}
break;
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I5b2bc1fae55faa342b863721c9838342442831a9
Gerrit-Change-Number: 4285
Gerrit-PatchSet: 1
Gerrit-Owner: Andreas Sandberg <andreas.sandb...@arm.com>
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