Andreas Sandberg has uploaded this change for review. (
https://gem5-review.googlesource.com/5744
Change subject: system-arm: add armv8 dts files with psci calls
......................................................................
system-arm: add armv8 dts files with psci calls
Created the dts file supporting psci 1.0 specification and changed the
makefile to generate the dtb files for armv8 platforms with
{1,2,4,8,16} cpus.
Change-Id: Iffa360718c2d6806e852c366340c462a37b88005
Reviewed-by: Andreas Sandberg <[email protected]>
---
M system/arm/dt/Makefile
A system/arm/dt/armv8_psci.dts
2 files changed, 181 insertions(+), 1 deletion(-)
diff --git a/system/arm/dt/Makefile b/system/arm/dt/Makefile
index 62cf65f..f754518 100644
--- a/system/arm/dt/Makefile
+++ b/system/arm/dt/Makefile
@@ -1,4 +1,4 @@
-# Copyright (c) 2015-2016 ARM Limited
+# Copyright (c) 2015-2017 ARM Limited
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
@@ -38,6 +38,9 @@
armv8_gem5_v1_1cpu.dtb armv8_gem5_v1_2cpu.dtb \
armv8_gem5_v1_4cpu.dtb armv8_gem5_v1_8cpu.dtb \
armv8_gem5_v1_16cpu.dtb \
+ armv8_psci_gem5_v1_1cpu.dtb armv8_psci_gem5_v1_2cpu.dtb \
+ armv8_psci_gem5_v1_4cpu.dtb armv8_psci_gem5_v1_8cpu.dtb \
+ armv8_psci_gem5_v1_16cpu.dtb \
armv8_gem5_v1_big_little_2_2.dtb \
armv8_gem5_v1_big_little_2_4.dtb
@@ -56,6 +59,9 @@
.gen/armv8_gem5_v1_%cpu.dts: armv8.dts platforms/vexpress_gem5_v1.dtsi
$(call GEN_DTS,vexpress_gem5_v1.dtsi,$*)
+.gen/armv8_psci_gem5_v1_%cpu.dts: armv8_psci.dts
platforms/vexpress_gem5_v1.dtsi
+ $(call GEN_DTS,vexpress_gem5_v1.dtsi,$*)
+
.gen/armv8_gem5_v1_big_little%.dts: armv8_big_little.dts \
platforms/vexpress_gem5_v1.dtsi
$(call GEN_DTS,vexpress_gem5_v1.dtsi,$*)
diff --git a/system/arm/dt/armv8_psci.dts b/system/arm/dt/armv8_psci.dts
new file mode 100644
index 0000000..2b38b19
--- /dev/null
+++ b/system/arm/dt/armv8_psci.dts
@@ -0,0 +1,174 @@
+/*
+ * Copyright (c) 2015-2017 ARM Limited
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andreas Sandberg
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x80000000 0x00010000;
+
+#include CONF_PLATFORM
+
+#define CPU(n) \
+ cpu@ ## n { \
+ device_type = "cpu"; \
+ compatible = "gem5,armv8", "arm,armv8"; \
+ reg = < n >; \
+ enable-method = "psci";\
+ cpu-idle-states = <&CPU_SLEEP_0 &CPU_SLEEP_1>;\
+ };
+
+/ {
+ model = "V2P-AARCH64";
+ compatible = "arm,vexpress,v2p-aarch64", "arm,vexpress";
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0 0x80000000 0x4 0x00000000>;
+ };
+
+ psci {
+ compatible = "arm,psci-1.0","arm,psci-0.2";
+ method = "smc";
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ idle-states {
+ entry-method = "arm,psci";
+
+ CPU_SLEEP_0: cpu-sleep-0 {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x0010000>;
+ entry-latency-us = <40>;
+ exit-latency-us = <100>;
+ min-residency-us = <150>;
+ };
+
+ CPU_SLEEP_1: cpu-sleep-1 {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x1010000>;
+ entry-latency-us = <80>;
+ exit-latency-us = <200>;
+ min-residency-us = <300>;
+ };
+ };
+
+ #if CONF_CPUS > 0
+ CPU(0)
+ #endif
+ #if CONF_CPUS > 1
+ CPU(1)
+ #endif
+ #if CONF_CPUS > 2
+ CPU(2)
+ #endif
+ #if CONF_CPUS > 3
+ CPU(3)
+ #endif
+ #if CONF_CPUS > 4
+ CPU(4)
+ #endif
+ #if CONF_CPUS > 5
+ CPU(5)
+ #endif
+ #if CONF_CPUS > 6
+ CPU(6)
+ #endif
+ #if CONF_CPUS > 7
+ CPU(7)
+ #endif
+ #if CONF_CPUS > 8
+ CPU(8)
+ #endif
+ #if CONF_CPUS > 9
+ CPU(9)
+ #endif
+ #if CONF_CPUS > 10
+ CPU(10)
+ #endif
+ #if CONF_CPUS > 11
+ CPU(11)
+ #endif
+ #if CONF_CPUS > 12
+ CPU(12)
+ #endif
+ #if CONF_CPUS > 13
+ CPU(13)
+ #endif
+ #if CONF_CPUS > 14
+ CPU(14)
+ #endif
+ #if CONF_CPUS > 15
+ CPU(15)
+ #endif
+ #if CONF_CPUS > 16
+ #error Unsupported number of CPUs
+ #endif
+ };
+
+ virt-encoder {
+ compatible = "drm,virtual-encoder";
+ port {
+ hdlcd0_virt_input: endpoint@0 {
+ remote-endpoint = <&hdlcd0_output>;
+ };
+ };
+
+ display-timings {
+ native-mode = <&timing0>;
+
+ timing0: timing_1080p60 {
+ /* 1920x1080-60 */
+ clock-frequency = <148500000>;
+ hactive = <1920>;
+ vactive = <1080>;
+ hfront-porch = <148>;
+ hback-porch = <88>;
+ hsync-len = <44>;
+ vfront-porch = <36>;
+ vback-porch = <4>;
+ vsync-len = <5>;
+ };
+ };
+ };
+};
+
+&hdlcd0 {
+ status = "ok";
+
+ port {
+ hdlcd0_output: endpoint@0 {
+ remote-endpoint = <&hdlcd0_virt_input>;
+ };
+ };
+};
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iffa360718c2d6806e852c366340c462a37b88005
Gerrit-Change-Number: 5744
Gerrit-PatchSet: 1
Gerrit-Owner: Andreas Sandberg <[email protected]>
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