Hello Giacomo Travaglini, Andreas Sandberg,
I'd like you to reexamine a change. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/12686
to look at the new patch set (#4).
Change subject: Pl011: Added registers UART_RSR/UART_ECR
......................................................................
Pl011: Added registers UART_RSR/UART_ECR
UART_RSR shows errors with the transmission and UART_ECR can clear
those (according to PL011 Technical Reference Manual Revision r1p4). As
these transmission errors never occur, they are implemented as RAZ/WI.
Both registers exist at the same offset 0x004. RSR is read-only, ECR is
write-only.
Change-Id: Ia9d13c90c65feccf3ecec36a782170755b1e1c02
---
M src/dev/arm/pl011.cc
M src/dev/arm/pl011.hh
2 files changed, 7 insertions(+), 0 deletions(-)
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Ia9d13c90c65feccf3ecec36a782170755b1e1c02
Gerrit-Change-Number: 12686
Gerrit-PatchSet: 4
Gerrit-Owner: MadMaurice <madnaur...@googlemail.com>
Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: MadMaurice <madnaur...@googlemail.com>
Gerrit-CC: Jason Lowe-Power <ja...@lowepower.com>
Gerrit-MessageType: newpatchset
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