Andrea Mondelli has submitted this change and it was merged. (
https://gem5-review.googlesource.com/c/public/gem5/+/16648 )
Change subject: mem-cache: alias to mem::getMasterPort in TLB class
......................................................................
mem-cache: alias to mem::getMasterPort in TLB class
TLB:getMasterPort is used to obtain the PageWalkMasterPort if present and
hides the BaseTLB::getMasterPort().
The TLB::getMasterPort() is renamed according to the expected behavior.
Change-Id: If4f61189094a706d59805cd10f4f814e5830eda8
Reviewed-on: https://gem5-review.googlesource.com/c/16648
Reviewed-by: Jason Lowe-Power <[email protected]>
Reviewed-by: Andreas Sandberg <[email protected]>
Maintainer: Andreas Sandberg <[email protected]>
---
M src/arch/arm/tlb.cc
M src/arch/arm/tlb.hh
M src/arch/generic/tlb.hh
M src/arch/x86/tlb.cc
M src/arch/x86/tlb.hh
M src/cpu/base.cc
6 files changed, 18 insertions(+), 13 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index 46056d0..ed7e680 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -1244,7 +1244,7 @@
}
BaseMasterPort*
-TLB::getMasterPort()
+TLB::getTableWalkerMasterPort()
{
return &stage2Mmu->getPort();
}
diff --git a/src/arch/arm/tlb.hh b/src/arch/arm/tlb.hh
index 637240a..8ca176a 100644
--- a/src/arch/arm/tlb.hh
+++ b/src/arch/arm/tlb.hh
@@ -401,7 +401,7 @@
*
* @return A pointer to the walker master port
*/
- BaseMasterPort* getMasterPort() override;
+ BaseMasterPort* getTableWalkerMasterPort() override;
// Caching misc register values here.
// Writing to misc registers needs to invalidate them.
diff --git a/src/arch/generic/tlb.hh b/src/arch/generic/tlb.hh
index 91f8f86..7865d8a 100644
--- a/src/arch/generic/tlb.hh
+++ b/src/arch/generic/tlb.hh
@@ -58,6 +58,7 @@
{}
public:
+
enum Mode { Read, Write, Execute };
class Translation
@@ -138,7 +139,7 @@
*
* @return A pointer to the walker master port or NULL if not present
*/
- virtual BaseMasterPort* getMasterPort() { return NULL; }
+ virtual BaseMasterPort* getTableWalkerMasterPort() { return NULL; }
void memInvalidate() { flushAll(); }
};
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index 829ebce..59fd3f0 100644
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -512,7 +512,7 @@
}
BaseMasterPort *
-TLB::getMasterPort()
+TLB::getTableWalkerMasterPort()
{
return &walker->getMasterPort("port");
}
diff --git a/src/arch/x86/tlb.hh b/src/arch/x86/tlb.hh
index 827ab81..8894a1e 100644
--- a/src/arch/x86/tlb.hh
+++ b/src/arch/x86/tlb.hh
@@ -165,7 +165,7 @@
*
* @return A pointer to the walker master port
*/
- BaseMasterPort *getMasterPort() override;
+ BaseMasterPort *getTableWalkerMasterPort() override;
};
}
diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index 30f6baf..09de646 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -621,10 +621,14 @@
ThreadContext::compare(oldTC, newTC);
*/
- BaseMasterPort *old_itb_port = oldTC->getITBPtr()->getMasterPort();
- BaseMasterPort *old_dtb_port = oldTC->getDTBPtr()->getMasterPort();
- BaseMasterPort *new_itb_port = newTC->getITBPtr()->getMasterPort();
- BaseMasterPort *new_dtb_port = newTC->getDTBPtr()->getMasterPort();
+ BaseMasterPort *old_itb_port =
+ oldTC->getITBPtr()->getTableWalkerMasterPort();
+ BaseMasterPort *old_dtb_port =
+ oldTC->getDTBPtr()->getTableWalkerMasterPort();
+ BaseMasterPort *new_itb_port =
+ newTC->getITBPtr()->getTableWalkerMasterPort();
+ BaseMasterPort *new_dtb_port =
+ newTC->getDTBPtr()->getTableWalkerMasterPort();
// Move over any table walker ports if they exist
if (new_itb_port) {
@@ -652,13 +656,13 @@
CheckerCPU *newChecker = newTC->getCheckerCpuPtr();
if (oldChecker && newChecker) {
BaseMasterPort *old_checker_itb_port =
- oldChecker->getITBPtr()->getMasterPort();
+ oldChecker->getITBPtr()->getTableWalkerMasterPort();
BaseMasterPort *old_checker_dtb_port =
- oldChecker->getDTBPtr()->getMasterPort();
+ oldChecker->getDTBPtr()->getTableWalkerMasterPort();
BaseMasterPort *new_checker_itb_port =
- newChecker->getITBPtr()->getMasterPort();
+ newChecker->getITBPtr()->getTableWalkerMasterPort();
BaseMasterPort *new_checker_dtb_port =
- newChecker->getDTBPtr()->getMasterPort();
+ newChecker->getDTBPtr()->getTableWalkerMasterPort();
newChecker->getITBPtr()->takeOverFrom(oldChecker->getITBPtr());
newChecker->getDTBPtr()->takeOverFrom(oldChecker->getDTBPtr());
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: If4f61189094a706d59805cd10f4f814e5830eda8
Gerrit-Change-Number: 16648
Gerrit-PatchSet: 8
Gerrit-Owner: Andrea Mondelli <[email protected]>
Gerrit-Reviewer: Andrea Mondelli <[email protected]>
Gerrit-Reviewer: Andreas Sandberg <[email protected]>
Gerrit-Reviewer: Gabe Black <[email protected]>
Gerrit-Reviewer: Jason Lowe-Power <[email protected]>
Gerrit-CC: Ivan Pizarro <[email protected]>
Gerrit-MessageType: merged
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