Daniel Carvalho has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/17539
Change subject: mem: Improve DPRINTF for Packets
......................................................................
mem: Improve DPRINTF for Packets
When printing Packet data, DPRINTF accesses internal information
and prints them, however this is unreliable, since the internals
of Packet can change. As Packet provides a print function, make
use of it when suitable instead.
Change-Id: I6b5010e3ef146c3a18a55f779999e78a119bb9db
Signed-off-by: Daniel R. Carvalho <[email protected]>
---
M src/mem/abstract_mem.cc
M src/mem/bridge.cc
M src/mem/cache/base.cc
M src/mem/cache/cache.cc
M src/mem/cache/noncoherent_cache.cc
M src/mem/cache/prefetch/queued.cc
M src/mem/dram_ctrl.cc
M src/mem/dramsim2.cc
M src/mem/external_slave.cc
M src/mem/hmc_controller.cc
M src/mem/noncoherent_xbar.cc
M src/mem/packet_queue.cc
M src/mem/qos/mem_sink.cc
M src/mem/ruby/system/RubyPort.cc
M src/mem/ruby/system/Sequencer.cc
M src/mem/serial_link.cc
16 files changed, 88 insertions(+), 114 deletions(-)
diff --git a/src/mem/abstract_mem.cc b/src/mem/abstract_mem.cc
index 3dc19d0..cd6dc3a 100644
--- a/src/mem/abstract_mem.cc
+++ b/src/mem/abstract_mem.cc
@@ -296,16 +296,14 @@
int size = pkt->getSize();
#if THE_ISA != NULL_ISA
if (size == 1 || size == 2 || size == 4 || size == 8) {
- DPRINTF(MemoryAccess,"%s from %s of size %i on address %#x data "
- "%#x %c\n", label,
sys->getMasterName(pkt->req->masterId()),
- size, pkt->getAddr(),
pkt->getUintX(TheISA::GuestByteOrder),
- pkt->req->isUncacheable() ? 'U' : 'C');
+ DPRINTF(MemoryAccess,"%s from %s: %s data %#x\n", label,
+ sys->getMasterName(pkt->req->masterId()), pkt->print(),
+ pkt->getUintX(TheISA::GuestByteOrder));
return;
}
#endif
- DPRINTF(MemoryAccess, "%s from %s of size %i on address %#x %c\n",
- label, sys->getMasterName(pkt->req->masterId()),
- size, pkt->getAddr(), pkt->req->isUncacheable() ? 'U' : 'C');
+ DPRINTF(MemoryAccess, "%s from %s: %s\n",
+ label, sys->getMasterName(pkt->req->masterId()), pkt->print());
DDUMP(MemoryAccess, pkt->getConstPtr<uint8_t>(), pkt->getSize());
}
@@ -318,14 +316,14 @@
AbstractMemory::access(PacketPtr pkt)
{
if (pkt->cacheResponding()) {
- DPRINTF(MemoryAccess, "Cache responding to %#llx: not
responding\n",
- pkt->getAddr());
+ DPRINTF(MemoryAccess, "Cache responding to %s: not responding\n",
+ pkt->print());
return;
}
if (pkt->cmd == MemCmd::CleanEvict || pkt->cmd ==
MemCmd::WritebackClean) {
- DPRINTF(MemoryAccess, "CleanEvict on 0x%x: not responding\n",
- pkt->getAddr());
+ DPRINTF(MemoryAccess, "Clean data on %s: not responding\n",
+ pkt->print());
return;
}
@@ -399,8 +397,8 @@
if (writeOK(pkt)) {
if (pmemAddr) {
pkt->writeData(hostAddr);
- DPRINTF(MemoryAccess, "%s wrote %i bytes to address %x\n",
- __func__, pkt->getSize(), pkt->getAddr());
+ DPRINTF(MemoryAccess, "%s write due to %s\n",
+ __func__, pkt->print());
}
assert(!pkt->req->isInstFetch());
TRACE_PACKET("Write");
diff --git a/src/mem/bridge.cc b/src/mem/bridge.cc
index 7428e7f..250f116 100644
--- a/src/mem/bridge.cc
+++ b/src/mem/bridge.cc
@@ -125,9 +125,7 @@
{
// all checks are done when the request is accepted on the slave
// side, so we are guaranteed to have space for the response
- DPRINTF(Bridge, "recvTimingResp: %s addr 0x%x\n",
- pkt->cmdString(), pkt->getAddr());
-
+ DPRINTF(Bridge, "%s: %s\n", __func__, pkt->print());
DPRINTF(Bridge, "Request queue size: %d\n", transmitList.size());
// technically the packet only reaches us after the header delay,
@@ -145,8 +143,7 @@
bool
Bridge::BridgeSlavePort::recvTimingReq(PacketPtr pkt)
{
- DPRINTF(Bridge, "recvTimingReq: %s addr 0x%x\n",
- pkt->cmdString(), pkt->getAddr());
+ DPRINTF(Bridge, "%s: %s\n", __func__, pkt->print());
panic_if(pkt->cacheResponding(), "Should not see packets where cache "
"is responding");
@@ -254,8 +251,8 @@
PacketPtr pkt = req.pkt;
- DPRINTF(Bridge, "trySend request addr 0x%x, queue size %d\n",
- pkt->getAddr(), transmitList.size());
+ DPRINTF(Bridge, "trySend request %s, queue size %d\n",
+ pkt->print(), transmitList.size());
if (sendTimingReq(pkt)) {
// send successful
@@ -292,8 +289,8 @@
PacketPtr pkt = resp.pkt;
- DPRINTF(Bridge, "trySend response addr 0x%x, outstanding %d\n",
- pkt->getAddr(), outstandingResponses);
+ DPRINTF(Bridge, "trySend response %s, outstanding %d\n",
+ pkt->print(), outstandingResponses);
if (sendTimingResp(pkt)) {
// send successful
diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index c741b1a..a5cd839 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -466,9 +466,6 @@
CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure());
if (is_fill && !is_error) {
- DPRINTF(Cache, "Block for addr %#llx being updated in Cache\n",
- pkt->getAddr());
-
const bool allocate = (writeAllocator && mshr->wasWholeLineWrite) ?
writeAllocator->allocate() : mshr->allocOnFill();
blk = handleFill(pkt, blk, writebacks, allocate);
@@ -1006,8 +1003,8 @@
// any ordering/decisions about ownership already taken
if (pkt->cmd == MemCmd::WritebackClean &&
mshrQueue.findMatch(pkt->getAddr(), pkt->isSecure())) {
- DPRINTF(Cache, "Clean writeback %#llx to block with MSHR, "
- "dropping\n", pkt->getAddr());
+ DPRINTF(Cache, "Clean writeback to block with MSHR,
dropping %s\n",
+ pkt->print());
// A writeback searches for the block, then writes the data.
// As the writeback is being dropped, the data is not touched,
@@ -1218,13 +1215,13 @@
// current request and then get rid of it
blk = tempBlock;
tempBlock->insert(addr, is_secure);
- DPRINTF(Cache, "using temp block for %#llx (%s)\n", addr,
- is_secure ? "s" : "ns");
+ DPRINTF(Cache, "Using temp block %s\n", tempBlock->print());
}
} else {
// existing block... probably an upgrade
// don't clear block status... if block is already dirty we
// don't want to lose that
+ DPRINTF(Cache, "Block %s updated due to response\n", blk->print());
}
// Block is guaranteed to be valid at this point
diff --git a/src/mem/cache/cache.cc b/src/mem/cache/cache.cc
index 3ffa4df..e5939df 100644
--- a/src/mem/cache/cache.cc
+++ b/src/mem/cache/cache.cc
@@ -284,8 +284,8 @@
outstandingSnoop.erase(pkt->req);
- DPRINTF(Cache, "Got prefetch response from above for addr "
- "%#llx (%s)\n", pkt->getAddr(),
pkt->isSecure() ? "s" : "ns");
+ DPRINTF(Cache, "Got prefetch response from above for %s\n",
+ pkt->print());
recvTimingResp(pkt);
return;
}
@@ -1071,8 +1071,8 @@
// above and in it's own cache, a new MemCmd::ReadReq is created that
// downstream caches observe.
if (pkt->mustCheckAbove()) {
- DPRINTF(Cache, "Found addr %#llx in upper level cache for
snoop %s "
- "from lower cache\n", pkt->getAddr(), pkt->print());
+ DPRINTF(Cache, "Found addr in upper level cache for snoop %s "
+ "from lower cache\n", pkt->print());
pkt->setBlockCached();
return snoop_delay;
}
@@ -1189,9 +1189,8 @@
// Let the MSHR itself track the snoop and decide whether we want
// to go ahead and do the regular cache snoop
if (mshr && mshr->handleSnoop(pkt, order++)) {
- DPRINTF(Cache, "Deferring snoop on in-service MSHR to blk %#llx
(%s)."
- "mshrs: %s\n", blk_addr, is_secure ? "s" : "ns",
- mshr->print());
+ DPRINTF(Cache, "Deferring snoop on in-service MSHR to %s.
mshrs: %s\n",
+ pkt->print(), mshr->print());
if (mshr->getNumTargets() > numTarget)
warn("allocating bonus target for snoop"); //handle later
@@ -1201,8 +1200,6 @@
//We also need to check the writeback buffers and handle those
WriteQueueEntry *wb_entry = writeBuffer.findMatch(blk_addr, is_secure);
if (wb_entry) {
- DPRINTF(Cache, "Snoop hit in writeback to addr %#llx (%s)\n",
- pkt->getAddr(), is_secure ? "s" : "ns");
// Expect to see only Writebacks and/or CleanEvicts here, both of
// which should not be generated for uncacheable data.
assert(!wb_entry->isUncacheable());
@@ -1212,6 +1209,9 @@
PacketPtr wb_pkt = wb_entry->getTarget()->pkt;
assert(wb_pkt->isEviction() || wb_pkt->cmd == MemCmd::WriteClean);
+ DPRINTF(Cache, "Snoop %s hit to writebuffer %s\n", pkt->print(),
+ wb_pkt->print());
+
if (pkt->isEviction()) {
// if the block is found in the write queue, set the
BLOCK_CACHED
// flag for Writeback/CleanEvict snoop. On return the snoop
will
@@ -1362,9 +1362,8 @@
bool pending_modified_resp = !snoop_pkt.hasSharers();
markInService(mshr, pending_modified_resp);
- DPRINTF(Cache, "Upward snoop of prefetch for addr"
- " %#x (%s) hit\n",
- tgt_pkt->getAddr(), tgt_pkt->isSecure()? "s": "ns");
+ DPRINTF(Cache, "Upward snoop of prefetch hit %s\n",
+ tgt_pkt->print());
return false;
}
diff --git a/src/mem/cache/noncoherent_cache.cc
b/src/mem/cache/noncoherent_cache.cc
index 9a2a1db..bc2b096 100644
--- a/src/mem/cache/noncoherent_cache.cc
+++ b/src/mem/cache/noncoherent_cache.cc
@@ -195,8 +195,6 @@
if (!bus_pkt->isError()) {
// Any reponse that does not have an error should be filling,
// afterall it is a read response
- DPRINTF(Cache, "Block for addr %#llx being updated in Cache\n",
- bus_pkt->getAddr());
blk = handleFill(bus_pkt, blk, writebacks,
allocOnFill(bus_pkt->cmd));
assert(blk);
}
diff --git a/src/mem/cache/prefetch/queued.cc
b/src/mem/cache/prefetch/queued.cc
index d7b8aac..cb0e001 100644
--- a/src/mem/cache/prefetch/queued.cc
+++ b/src/mem/cache/prefetch/queued.cc
@@ -126,7 +126,7 @@
pfIssued++;
issuedPrefetches += 1;
assert(pkt != nullptr);
- DPRINTF(HWPrefetch, "Generating prefetch for %#x.\n", pkt->getAddr());
+ DPRINTF(HWPrefetch, "Generating prefetch %s.\n", pkt->print());
return pkt;
}
@@ -267,7 +267,7 @@
it = prev;
}
DPRINTF(HWPrefetch, "Prefetch queue full, removing lowest
priority "
- "oldest packet, addr: %#x",
it->pfInfo.getAddr());
+ "oldest packet: %s", it->pkt->print());
delete it->pkt;
pfq.erase(it);
}
diff --git a/src/mem/dram_ctrl.cc b/src/mem/dram_ctrl.cc
index dd03cf1..88feb30 100644
--- a/src/mem/dram_ctrl.cc
+++ b/src/mem/dram_ctrl.cc
@@ -264,7 +264,7 @@
Tick
DRAMCtrl::recvAtomic(PacketPtr pkt)
{
- DPRINTF(DRAM, "recvAtomic: %s 0x%x\n", pkt->cmdString(),
pkt->getAddr());
+ DPRINTF(DRAM, "%s: %s\n", __func__, pkt->print());
panic_if(pkt->cacheResponding(), "Should not see packets where cache "
"is responding");
@@ -423,12 +423,13 @@
// address of first DRAM packet is kept unaliged. Subsequent DRAM
packets
// are aligned to burst size boundaries. This is to ensure we
accurately
// check read packets against packets in write queue.
- Addr addr = pkt->getAddr();
+ const Addr pkt_addr = pkt->getAddr();
+ Addr addr = pkt_addr;
unsigned pktsServicedByWrQ = 0;
BurstHelper* burst_helper = NULL;
for (int cnt = 0; cnt < pktCount; ++cnt) {
unsigned size = std::min((addr | (burstSize - 1)) + 1,
- pkt->getAddr() + pkt->getSize()) - addr;
+ pkt_addr + pkt->getSize()) - addr;
readPktSize[ceilLog2(size)]++;
readBursts++;
masterReadAccesses[pkt->masterId()]++;
@@ -468,7 +469,7 @@
// Make the burst helper for split packets
if (pktCount > 1 && burst_helper == NULL) {
DPRINTF(DRAM, "Read to addr %lld translates to %d "
- "dram requests\n", pkt->getAddr(), pktCount);
+ "dram requests\n", pkt_addr, pktCount);
burst_helper = new BurstHelper(pktCount);
}
@@ -523,10 +524,11 @@
// if the request size is larger than burst size, the pkt is split into
// multiple DRAM packets
- Addr addr = pkt->getAddr();
+ const Addr pkt_addr = pkt->getAddr();
+ Addr addr = pkt_addr;
for (int cnt = 0; cnt < pktCount; ++cnt) {
unsigned size = std::min((addr | (burstSize - 1)) + 1,
- pkt->getAddr() + pkt->getSize()) - addr;
+ pkt_addr + pkt->getSize()) - addr;
writePktSize[ceilLog2(size)]++;
writeBursts++;
masterWriteAccesses[pkt->masterId()]++;
@@ -616,8 +618,7 @@
DRAMCtrl::recvTimingReq(PacketPtr pkt)
{
// This is where we enter from the outside world
- DPRINTF(DRAM, "recvTimingReq: request %s addr %lld size %d\n",
- pkt->cmdString(), pkt->getAddr(), pkt->getSize());
+ DPRINTF(DRAM, "%s: request %s\n", __func__, pkt->print());
panic_if(pkt->cacheResponding(), "Should not see packets where cache "
"is responding");
@@ -916,7 +917,7 @@
void
DRAMCtrl::accessAndRespond(PacketPtr pkt, Tick static_latency)
{
- DPRINTF(DRAM, "Responding to Address %lld.. ",pkt->getAddr());
+ DPRINTF(DRAM, "Responding to %s\n", pkt->print());
bool needsResponse = pkt->needsResponse();
// do the actual memory access which also turns the packet into a
diff --git a/src/mem/dramsim2.cc b/src/mem/dramsim2.cc
index f0c6121..cea9cde 100644
--- a/src/mem/dramsim2.cc
+++ b/src/mem/dramsim2.cc
@@ -250,7 +250,7 @@
void
DRAMSim2::accessAndRespond(PacketPtr pkt)
{
- DPRINTF(DRAMSim2, "Access for address %lld\n", pkt->getAddr());
+ DPRINTF(DRAMSim2, "Access to %s\n", pkt->print());
bool needsResponse = pkt->needsResponse();
@@ -268,8 +268,7 @@
// Reset the timings of the packet
pkt->headerDelay = pkt->payloadDelay = 0;
- DPRINTF(DRAMSim2, "Queuing response for address %lld\n",
- pkt->getAddr());
+ DPRINTF(DRAMSim2, "Queuing response %s\n", pkt->print());
// queue it to be sent back
responseQueue.push_back(pkt);
diff --git a/src/mem/external_slave.cc b/src/mem/external_slave.cc
index 6266f66..237b4f0 100644
--- a/src/mem/external_slave.cc
+++ b/src/mem/external_slave.cc
@@ -99,11 +99,9 @@
StubSlavePort::recvAtomic(PacketPtr packet)
{
if (DTRACE(ExternalPort)) {
- unsigned int M5_VAR_USED size = packet->getSize();
-
- DPRINTF(ExternalPort, "StubSlavePort: recvAtomic a: 0x%x size: %d"
- " data: ...\n", packet->getAddr(), size);
- DDUMP(ExternalPort, packet->getConstPtr<uint8_t>(), size);
+ DPRINTF(ExternalPort, "StubSlavePort: %s %s data: ...\n", __func__,
+ packet->print());
+ DDUMP(ExternalPort, packet->getConstPtr<uint8_t>(),
packet->getSize());
}
return 0;
diff --git a/src/mem/hmc_controller.cc b/src/mem/hmc_controller.cc
index c8938b7..04f4575 100644
--- a/src/mem/hmc_controller.cc
+++ b/src/mem/hmc_controller.cc
@@ -54,13 +54,13 @@
// test if the layer should be considered occupied for the current
// port
if (!reqLayers[master_port_id]->tryTiming(src_port)) {
- DPRINTF(HMCController, "recvTimingReq: src %s %s 0x%x BUSY\n",
- src_port->name(), pkt->cmdString(), pkt->getAddr());
+ DPRINTF(HMCController, "%s: src %s Packet %s BUSY\n", __func__,
+ src_port->name(), pkt->print());
return false;
}
- DPRINTF(HMCController, "recvTimingReq: src %s %s 0x%x\n",
- src_port->name(), pkt->cmdString(), pkt->getAddr());
+ DPRINTF(HMCController, "%s: src %s Packet %s\n", __func__,
+ src_port->name(), pkt->print());
// store size and command as they might be modified when
// forwarding the packet
@@ -88,8 +88,8 @@
bool success = masterPorts[master_port_id]->sendTimingReq(pkt);
if (!success) {
- DPRINTF(HMCController, "recvTimingReq: src %s %s 0x%x RETRY\n",
- src_port->name(), pkt->cmdString(), pkt->getAddr());
+ DPRINTF(HMCController, "%s: src %s Packet %s RETRY\n", __func__,
+ src_port->name(), pkt->print());
// restore the header delay as it is additive
pkt->headerDelay = old_header_delay;
diff --git a/src/mem/noncoherent_xbar.cc b/src/mem/noncoherent_xbar.cc
index 0f4b720..b159993 100644
--- a/src/mem/noncoherent_xbar.cc
+++ b/src/mem/noncoherent_xbar.cc
@@ -113,13 +113,13 @@
// test if the layer should be considered occupied for the current
// port
if (!reqLayers[master_port_id]->tryTiming(src_port)) {
- DPRINTF(NoncoherentXBar, "recvTimingReq: src %s %s 0x%x BUSY\n",
- src_port->name(), pkt->cmdString(), pkt->getAddr());
+ DPRINTF(NoncoherentXBar, "%s: src %s Packet %s BUSY\n",
+ __func__, src_port->name(), pkt->print());
return false;
}
- DPRINTF(NoncoherentXBar, "recvTimingReq: src %s %s 0x%x\n",
- src_port->name(), pkt->cmdString(), pkt->getAddr());
+ DPRINTF(NoncoherentXBar, "%s: src %s Packet %s\n",
+ __func__, src_port->name(), pkt->print());
// store size and command as they might be modified when
// forwarding the packet
@@ -147,8 +147,8 @@
bool success = masterPorts[master_port_id]->sendTimingReq(pkt);
if (!success) {
- DPRINTF(NoncoherentXBar, "recvTimingReq: src %s %s 0x%x RETRY\n",
- src_port->name(), pkt->cmdString(), pkt->getAddr());
+ DPRINTF(NoncoherentXBar, "%s: src %s Packet %s RETRY\n",
+ __func__, src_port->name(), pkt->print());
// restore the header delay as it is additive
pkt->headerDelay = old_header_delay;
@@ -192,13 +192,13 @@
// test if the layer should be considered occupied for the current
// port
if (!respLayers[slave_port_id]->tryTiming(src_port)) {
- DPRINTF(NoncoherentXBar, "recvTimingResp: src %s %s 0x%x BUSY\n",
- src_port->name(), pkt->cmdString(), pkt->getAddr());
+ DPRINTF(NoncoherentXBar, "%s: src %s Packet %s BUSY\n",
+ __func__, src_port->name(), pkt->print());
return false;
}
- DPRINTF(NoncoherentXBar, "recvTimingResp: src %s %s 0x%x\n",
- src_port->name(), pkt->cmdString(), pkt->getAddr());
+ DPRINTF(NoncoherentXBar, "%s: src %s Packet %s\n",
+ __func__, src_port->name(), pkt->print());
// store size and command as they might be modified when
// forwarding the packet
@@ -245,9 +245,8 @@
Tick
NoncoherentXBar::recvAtomic(PacketPtr pkt, PortID slave_port_id)
{
- DPRINTF(NoncoherentXBar, "recvAtomic: packet src %s addr 0x%x
cmd %s\n",
- slavePorts[slave_port_id]->name(), pkt->getAddr(),
- pkt->cmdString());
+ DPRINTF(NoncoherentXBar, "%s: packet src %s Packet %s\n",
+ __func__, slavePorts[slave_port_id]->name(), pkt->print());
unsigned int pkt_size = pkt->hasData() ? pkt->getSize() : 0;
unsigned int pkt_cmd = pkt->cmdToIndex();
@@ -285,9 +284,8 @@
if (!pkt->isPrint()) {
// don't do DPRINTFs on PrintReq as it clutters up the output
DPRINTF(NoncoherentXBar,
- "recvFunctional: packet src %s addr 0x%x cmd %s\n",
- slavePorts[slave_port_id]->name(), pkt->getAddr(),
- pkt->cmdString());
+ "%s: packet src %s Packet %s\n",
+ __func__, slavePorts[slave_port_id]->name(), pkt->print());
}
// since our slave ports are queued ports we need to check them as well
diff --git a/src/mem/packet_queue.cc b/src/mem/packet_queue.cc
index 4e1e925..d2cd03a 100644
--- a/src/mem/packet_queue.cc
+++ b/src/mem/packet_queue.cc
@@ -107,9 +107,8 @@
void
PacketQueue::schedSendTiming(PacketPtr pkt, Tick when)
{
- DPRINTF(PacketQueue, "%s for %s address %x size %d when %lu ord: %i\n",
- __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize(),
when,
- forceOrder);
+ DPRINTF(PacketQueue, "%s for Packet %s when %lu ord: %i\n",
+ __func__, pkt->print(), when, forceOrder);
// we can still send a packet before the end of this tick
assert(when >= curTick());
diff --git a/src/mem/qos/mem_sink.cc b/src/mem/qos/mem_sink.cc
index 3ff2339..1e37299 100644
--- a/src/mem/qos/mem_sink.cc
+++ b/src/mem/qos/mem_sink.cc
@@ -132,10 +132,8 @@
__func__);
DPRINTF(QOS,
- "%s: MASTER %s request %s addr %lld size %d\n",
- __func__,
- _system->getMasterName(pkt->req->masterId()),
- pkt->cmdString(), pkt->getAddr(), pkt->getSize());
+ "%s: MASTER %s request %s\n", __func__,
+ _system->getMasterName(pkt->req->masterId()), pkt->print());
uint64_t required_entries = divCeil(pkt->getSize(), memoryPacketSize);
diff --git a/src/mem/ruby/system/RubyPort.cc
b/src/mem/ruby/system/RubyPort.cc
index 795b473..413e45a 100644
--- a/src/mem/ruby/system/RubyPort.cc
+++ b/src/mem/ruby/system/RubyPort.cc
@@ -157,7 +157,7 @@
RubyPort::PioMasterPort::recvTimingResp(PacketPtr pkt)
{
RubyPort *rp = static_cast<RubyPort *>(&owner);
- DPRINTF(RubyPort, "Response for address: 0x%#x\n", pkt->getAddr());
+ DPRINTF(RubyPort, "Response to %s\n", pkt->print());
// send next cycle
rp->pioSlavePort.schedTimingResp(
@@ -233,8 +233,7 @@
bool
RubyPort::MemSlavePort::recvTimingReq(PacketPtr pkt)
{
- DPRINTF(RubyPort, "Timing request for address %#x on port %d\n",
- pkt->getAddr(), id);
+ DPRINTF(RubyPort, "Timing request to %s on port %d\n", pkt->print(),
id);
RubyPort *ruby_port = static_cast<RubyPort *>(&owner);
if (pkt->cacheResponding())
@@ -283,16 +282,13 @@
// route the response
pkt->pushSenderState(new SenderState(this));
- DPRINTF(RubyPort, "Request %s address %#x issued\n",
pkt->cmdString(),
- pkt->getAddr());
+ DPRINTF(RubyPort, "Request %s issued\n", pkt->print());
return true;
}
if (pkt->cmd != MemCmd::MemFenceReq) {
- DPRINTF(RubyPort,
- "Request %s for address %#x did not issue because %s\n",
- pkt->cmdString(), pkt->getAddr(),
- RequestStatus_to_string(requestStatus));
+ DPRINTF(RubyPort, "Request %s did not issue because %s\n",
+ pkt->print(), RequestStatus_to_string(requestStatus));
}
addToRetryList();
@@ -360,7 +356,7 @@
void
RubyPort::MemSlavePort::recvFunctional(PacketPtr pkt)
{
- DPRINTF(RubyPort, "Functional access for address: %#x\n",
pkt->getAddr());
+ DPRINTF(RubyPort, "Functional access to %s\n", pkt->print());
RubyPort *rp M5_VAR_USED = static_cast<RubyPort *>(&owner);
RubySystem *rs = rp->m_ruby_system;
@@ -416,8 +412,7 @@
void
RubyPort::ruby_hit_callback(PacketPtr pkt)
{
- DPRINTF(RubyPort, "Hit callback for %s 0x%x\n", pkt->cmdString(),
- pkt->getAddr());
+ DPRINTF(RubyPort, "Hit callback for %s\n", pkt->print());
// The packet was destined for memory and has not yet been turned
// into a response
diff --git a/src/mem/ruby/system/Sequencer.cc
b/src/mem/ruby/system/Sequencer.cc
index 41ec6ea..30e8e7a 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -500,8 +500,8 @@
// subBlock with the recieved data. The tester will later access
// this state.
if (m_usingRubyTester) {
- DPRINTF(RubySequencer, "hitCallback %s 0x%x using RubyTester\n",
- pkt->cmdString(), pkt->getAddr());
+ DPRINTF(RubySequencer, "hitCallback %s using RubyTester\n",
+ pkt->print());
RubyTester::SenderState* testerSenderState =
pkt->findNextSenderState<RubyTester::SenderState>();
assert(testerSenderState);
diff --git a/src/mem/serial_link.cc b/src/mem/serial_link.cc
index 438fb0e..1f4cad1 100644
--- a/src/mem/serial_link.cc
+++ b/src/mem/serial_link.cc
@@ -133,9 +133,7 @@
{
// all checks are done when the request is accepted on the slave
// side, so we are guaranteed to have space for the response
- DPRINTF(SerialLink, "recvTimingResp: %s addr 0x%x\n",
- pkt->cmdString(), pkt->getAddr());
-
+ DPRINTF(SerialLink, "%s: %s\n", __func__, pkt->print());
DPRINTF(SerialLink, "Request queue size: %d\n", transmitList.size());
// @todo: We need to pay for this and not just zero it out
@@ -164,8 +162,7 @@
bool
SerialLink::SerialLinkSlavePort::recvTimingReq(PacketPtr pkt)
{
- DPRINTF(SerialLink, "recvTimingReq: %s addr 0x%x\n",
- pkt->cmdString(), pkt->getAddr());
+ DPRINTF(SerialLink, "%s: %s\n", __func__, pkt->print());
// we should not see a timing request if we are already in a retry
assert(!retryReq);
@@ -280,8 +277,8 @@
PacketPtr pkt = req.pkt;
- DPRINTF(SerialLink, "trySend request addr 0x%x, queue size %d\n",
- pkt->getAddr(), transmitList.size());
+ DPRINTF(SerialLink, "trySend request %s, queue size %d\n",
+ pkt->print(), transmitList.size());
if (sendTimingReq(pkt)) {
// send successful
@@ -323,8 +320,8 @@
PacketPtr pkt = resp.pkt;
- DPRINTF(SerialLink, "trySend response addr 0x%x, outstanding %d\n",
- pkt->getAddr(), outstandingResponses);
+ DPRINTF(SerialLink, "trySend response %s, outstanding %d\n",
+ pkt->print(), outstandingResponses);
if (sendTimingResp(pkt)) {
// send successful
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/17539
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I6b5010e3ef146c3a18a55f779999e78a119bb9db
Gerrit-Change-Number: 17539
Gerrit-PatchSet: 1
Gerrit-Owner: Daniel Carvalho <[email protected]>
Gerrit-MessageType: newchange
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