Giacomo Travaglini has submitted this change and it was merged. (
https://gem5-review.googlesource.com/c/public/gem5/+/17989 )
Change subject: arch-arm: Expose haveGicv3CPUInterface to the ISA interface
......................................................................
arch-arm: Expose haveGicv3CPUInterface to the ISA interface
Change-Id: I36232b7618ad875983f34b741c51f12ddb9ae166
Signed-off-by: Giacomo Travaglini <[email protected]>
Reviewed-by: Andreas Sandberg <[email protected]>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17989
Maintainer: Andreas Sandberg <[email protected]>
Tested-by: kokoro <[email protected]>
---
M src/arch/arm/isa.cc
M src/arch/arm/isa.hh
2 files changed, 16 insertions(+), 1 deletion(-)
Approvals:
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 654608a..cdc44cd 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -65,7 +65,8 @@
_vecRegRenameMode(Enums::Full),
pmu(p->pmu),
haveGICv3CPUInterface(false),
- impdefAsNop(p->impdef_nop)
+ impdefAsNop(p->impdef_nop),
+ afterStartup(false)
{
miscRegs[MISCREG_SCTLR_RST] = 0;
@@ -406,6 +407,8 @@
gicv3CpuInterface->setThreadContext(tc);
}
}
+
+ afterStartup = true;
}
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index 1931306..b4689d7 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -105,6 +105,8 @@
*/
bool impdefAsNop;
+ bool afterStartup;
+
/** MiscReg metadata **/
struct MiscRegLUTEntry {
uint32_t lower; // Lower half mapped to this register
@@ -706,6 +708,16 @@
Enums::DecoderFlavour decoderFlavour() const { return
_decoderFlavour; }
+ /** Getter for haveGICv3CPUInterface */
+ bool haveGICv3CpuIfc() const
+ {
+ // haveGICv3CPUInterface is initialized at startup time, hence
+ // trying to read its value before the startup stage will lead
+ // to an error
+ assert(afterStartup);
+ return haveGICv3CPUInterface;
+ }
+
Enums::VecRegRenameMode
vecRegRenameMode() const
{
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I36232b7618ad875983f34b741c51f12ddb9ae166
Gerrit-Change-Number: 17989
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: Andreas Sandberg <[email protected]>
Gerrit-Reviewer: Ciro Santilli <[email protected]>
Gerrit-Reviewer: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-MessageType: merged
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