Unless KVM can intercept SVC instructions somehow? Maybe because they sort of cause an interrupt? I have my doubts, but I'll look into that since if it's true it would make life a lot easier.
Gabe On Fri, Nov 15, 2019 at 1:24 PM Gabe Black <[email protected]> wrote: > > > On Fri, Nov 15, 2019 at 4:07 AM Giacomo Travaglini < > [email protected]> wrote: > >> Hi Gabe, >> >> Yes, as I was mentioning in >> https://gem5-review.googlesource.com/c/public/gem5/+/22118/5, if fast >> models implements arm watchpoints (by writing some self hosted debug >> registers, >> and not reying on custom made hooks after the PA is evaluated), those >> trap on VA matches. >> > > These are not actual architected watchpoints (at least as far as I know), > these are artificial breakpoints, watchpoints, etc, which are provided by > the model itself. > > >> >> I would personally love to see m5 pseudo instructions being implemented >> with arm semishosting, not only for the FastModel use case. >> From a m5 pow seems like you would just need to change the macro >> in util/m5/m5op_arm_A64.S >> (of course you would have to add the implementation in the semihosting >> files; how does this work with fast models?) >> > > To implement them in most cases would be easy, but the problem is > supporting them everywhere. The problem (as I attempted to describe in my > initial email) is that KVM has no notion of semihosting, and as far as I > can tell no way to hook the appropriate instructions to intercept them. > > To summarize, the options are: > > Special instructions: Works only in native CPUs. > Special memory locations: Works in native CPUs and KVM > Semihosting: Works in native CPUs and fast models. > > There isn't anything that works in all CPUs, meaning there needs to be > different behavior depending on what CPU you're using at the time. That > could mean different binaries, or a binary that somehow magically detects > what it should use, or specifying on the command line, or... > > Gabe > >> _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
