Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/23281 )
Change subject: cpu: Add byteEnable assertions to readMem and initateMemRead
......................................................................
cpu: Add byteEnable assertions to readMem and initateMemRead
Those are already present in writeMem; looking for consistency
Change-Id: Ib85e0db228bc73e3ac64155d1290444cf6864a8c
Signed-off-by: Giacomo Travaglini <[email protected]>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23281
Reviewed-by: Jason Lowe-Power <[email protected]>
Reviewed-by: Daniel Carvalho <[email protected]>
Reviewed-by: Bobby R. Bruce <[email protected]>
Tested-by: kokoro <[email protected]>
Maintainer: Bobby R. Bruce <[email protected]>
---
M src/cpu/base_dyn_inst.hh
M src/cpu/checker/cpu.cc
M src/cpu/minor/exec_context.hh
M src/cpu/simple/exec_context.hh
4 files changed, 7 insertions(+), 0 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Daniel Carvalho: Looks good to me, but someone else must approve
Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index 4b4b05c..c228357 100644
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -965,6 +965,7 @@
Request::Flags flags,
const std::vector<bool>& byteEnable)
{
+ assert(byteEnable.empty() || byteEnable.size() == size);
return cpu->pushRequest(
dynamic_cast<typename DynInstPtr::PtrType>(this),
/* ld */ true, nullptr, size, addr, flags, nullptr, nullptr,
@@ -977,6 +978,7 @@
Request::Flags flags, uint64_t *res,
const std::vector<bool>& byteEnable)
{
+ assert(byteEnable.empty() || byteEnable.size() == size);
return cpu->pushRequest(
dynamic_cast<typename DynInstPtr::PtrType>(this),
/* st */ false, data, size, addr, flags, res, nullptr,
byteEnable);
diff --git a/src/cpu/checker/cpu.cc b/src/cpu/checker/cpu.cc
index cca6d6b..48ee059 100644
--- a/src/cpu/checker/cpu.cc
+++ b/src/cpu/checker/cpu.cc
@@ -178,6 +178,8 @@
Request::Flags flags,
const std::vector<bool>& byteEnable)
{
+ assert(byteEnable.empty() || byteEnable.size() == size);
+
Fault fault = NoFault;
bool checked_flags = false;
bool flags_match = true;
diff --git a/src/cpu/minor/exec_context.hh b/src/cpu/minor/exec_context.hh
index 184dd29..9b347b2 100644
--- a/src/cpu/minor/exec_context.hh
+++ b/src/cpu/minor/exec_context.hh
@@ -116,6 +116,7 @@
const std::vector<bool>& byteEnable =
std::vector<bool>())
override
{
+ assert(byteEnable.empty() || byteEnable.size() == size);
return execute.getLSQ().pushRequest(inst, true /* load */, nullptr,
size, addr, flags, nullptr, nullptr, byteEnable);
}
diff --git a/src/cpu/simple/exec_context.hh b/src/cpu/simple/exec_context.hh
index 48a9f94..8e4aa39 100644
--- a/src/cpu/simple/exec_context.hh
+++ b/src/cpu/simple/exec_context.hh
@@ -440,6 +440,7 @@
const std::vector<bool>& byteEnable = std::vector<bool>())
override
{
+ assert(byteEnable.empty() || byteEnable.size() == size);
return cpu->readMem(addr, data, size, flags, byteEnable);
}
@@ -449,6 +450,7 @@
const std::vector<bool>& byteEnable =
std::vector<bool>())
override
{
+ assert(byteEnable.empty() || byteEnable.size() == size);
return cpu->initiateMemRead(addr, size, flags, byteEnable);
}
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Ib85e0db228bc73e3ac64155d1290444cf6864a8c
Gerrit-Change-Number: 23281
Gerrit-PatchSet: 3
Gerrit-Owner: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: Andreas Sandberg <[email protected]>
Gerrit-Reviewer: Anthony Gutierrez <[email protected]>
Gerrit-Reviewer: Bobby R. Bruce <[email protected]>
Gerrit-Reviewer: Daniel Carvalho <[email protected]>
Gerrit-Reviewer: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: Jason Lowe-Power <[email protected]>
Gerrit-Reviewer: Tuan Ta <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-MessageType: merged
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