Hi folks. I do most of my aarch64 assembly level programming by example, ie by just doing what other code I can find is already doing. I'm trying to test some code I wrote to checkpoint the FP state in a fast model ARM CPU, and to do that I need to load known values into those registers to make sure they end up in the right place in the checkpoint.
What assembly instruction should I use to maximally load up those registers with a known bit pattern? Ideally it would be something where I could tell that the right bits ended up in the right register and in the right part of the register. This particular CPU (CortexA76) does not seem to have SVE, so this would need to be a neon type instruction. Sorry for the dumb question, but I figure this might be a very easy question for somebody to answer which would save me a lot of trial and error trying to find the right instruction and syntax to get it going. Thanks! Gabe _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
