Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/35395 )
Change subject: dev-arm: Define ArmInterruptType
......................................................................
dev-arm: Define ArmInterruptType
This is a scoped enum meant to be used mainly in the python world
for DTB autogeneration. By making an ArmInterruptPin self aware of
its own type, we can use it in the C++ world when modelling devices.
For example if a device spec is enforcing a specific triggering behaviour,
its gem5 implementation can query the interrupt type and panic if its
expectations are not met. In this way we are sure what the Linux kernel
sees in the DTB is in sync with how the model really behaves
Change-Id: I66ae3cfbc7b1ed94804f1f882c12eb31f70840da
Signed-off-by: Giacomo Travaglini <[email protected]>
---
M src/dev/arm/Gic.py
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/src/dev/arm/Gic.py b/src/dev/arm/Gic.py
index e2229b8..17a553f 100644
--- a/src/dev/arm/Gic.py
+++ b/src/dev/arm/Gic.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2012-2013, 2017-2019 ARM Limited
+# Copyright (c) 2012-2013, 2017-2020 ARM Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@@ -70,6 +70,19 @@
assert self._state.interrupt_cells == 3
return [ int_type, int_num, int_flag ]
+class ArmInterruptType(ScopedEnum):
+ """
+ The values of the scoped enum are matching Linux macroes
+ defined in include/linux/irq.h. They are mainly meant
+ to be used for DTB autogen
+ """
+ map = {
+ 'IRQ_TYPE_EDGE_RISING' : 0x1,
+ 'IRQ_TYPE_EDGE_FALLING' : 0x2,
+ 'IRQ_TYPE_LEVEL_HIGH' : 0x4,
+ 'IRQ_TYPE_LEVEL_LOW' : 0x8
+ }
+
class ArmInterruptPin(SimObject):
type = 'ArmInterruptPin'
cxx_header = "dev/arm/base_gic.hh"
@@ -78,6 +91,8 @@
platform = Param.Platform(Parent.any, "Platform with interrupt
controller")
num = Param.UInt32("Interrupt number in GIC")
+ int_type = Param.ArmInterruptType('IRQ_TYPE_LEVEL_HIGH',
+ "Interrupt type (level/edge triggered)")
class ArmSPI(ArmInterruptPin):
type = 'ArmSPI'
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I66ae3cfbc7b1ed94804f1f882c12eb31f70840da
Gerrit-Change-Number: 35395
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini <[email protected]>
Gerrit-MessageType: newchange
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