Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/35395 )
Change subject: dev-arm: Define ArmInterruptType
......................................................................
dev-arm: Define ArmInterruptType
This is a scoped enum meant to be used mainly in the python world
for DTB autogeneration. By making an ArmInterruptPin self aware of
its own type, we can use it in the C++ world when modelling devices.
For example if a device spec is enforcing a specific triggering behaviour,
its gem5 implementation can query the interrupt type and panic if its
expectations are not met. In this way we are sure what the Linux kernel
sees in the DTB is in sync with how the model really behaves
Change-Id: I66ae3cfbc7b1ed94804f1f882c12eb31f70840da
Signed-off-by: Giacomo Travaglini <[email protected]>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35395
Reviewed-by: Andreas Sandberg <[email protected]>
Maintainer: Andreas Sandberg <[email protected]>
Tested-by: kokoro <[email protected]>
---
M src/dev/arm/Gic.py
M src/dev/arm/base_gic.cc
M src/dev/arm/base_gic.hh
3 files changed, 33 insertions(+), 14 deletions(-)
Approvals:
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/dev/arm/Gic.py b/src/dev/arm/Gic.py
index e2229b8..17a553f 100644
--- a/src/dev/arm/Gic.py
+++ b/src/dev/arm/Gic.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2012-2013, 2017-2019 ARM Limited
+# Copyright (c) 2012-2013, 2017-2020 ARM Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@@ -70,6 +70,19 @@
assert self._state.interrupt_cells == 3
return [ int_type, int_num, int_flag ]
+class ArmInterruptType(ScopedEnum):
+ """
+ The values of the scoped enum are matching Linux macroes
+ defined in include/linux/irq.h. They are mainly meant
+ to be used for DTB autogen
+ """
+ map = {
+ 'IRQ_TYPE_EDGE_RISING' : 0x1,
+ 'IRQ_TYPE_EDGE_FALLING' : 0x2,
+ 'IRQ_TYPE_LEVEL_HIGH' : 0x4,
+ 'IRQ_TYPE_LEVEL_LOW' : 0x8
+ }
+
class ArmInterruptPin(SimObject):
type = 'ArmInterruptPin'
cxx_header = "dev/arm/base_gic.hh"
@@ -78,6 +91,8 @@
platform = Param.Platform(Parent.any, "Platform with interrupt
controller")
num = Param.UInt32("Interrupt number in GIC")
+ int_type = Param.ArmInterruptType('IRQ_TYPE_LEVEL_HIGH',
+ "Interrupt type (level/edge triggered)")
class ArmSPI(ArmInterruptPin):
type = 'ArmSPI'
diff --git a/src/dev/arm/base_gic.cc b/src/dev/arm/base_gic.cc
index 493ffa6..f94d197 100644
--- a/src/dev/arm/base_gic.cc
+++ b/src/dev/arm/base_gic.cc
@@ -81,7 +81,7 @@
}
ArmSPIGen::ArmSPIGen(const ArmSPIParams &p)
- : ArmInterruptPinGen(p), pin(new ArmSPI(p.platform, p.num))
+ : ArmInterruptPinGen(p), pin(new ArmSPI(p))
{
}
@@ -110,7 +110,7 @@
} else {
// Generate PPI Pin
auto &p = static_cast<const ArmPPIParams &>(_params);
- ArmPPI *pin = new ArmPPI(p.platform, tc, p.num);
+ ArmPPI *pin = new ArmPPI(p, tc);
pins.insert({cid, pin});
@@ -119,9 +119,9 @@
}
ArmInterruptPin::ArmInterruptPin(
- Platform *_platform, ThreadContext *tc, uint32_t int_num)
- : threadContext(tc), platform(dynamic_cast<RealView*>(_platform)),
- intNum(int_num), _active(false)
+ const ArmInterruptPinParams &p, ThreadContext *tc)
+ : threadContext(tc), platform(dynamic_cast<RealView*>(p.platform)),
+ intNum(p.num), triggerType(p.int_type), _active(false)
{
fatal_if(!platform, "Interrupt not connected to a RealView platform");
}
@@ -156,8 +156,8 @@
}
ArmSPI::ArmSPI(
- Platform *_platform, uint32_t int_num)
- : ArmInterruptPin(_platform, nullptr, int_num)
+ const ArmSPIParams &p)
+ : ArmInterruptPin(p, nullptr)
{
}
@@ -176,8 +176,8 @@
}
ArmPPI::ArmPPI(
- Platform *_platform, ThreadContext *tc, uint32_t int_num)
- : ArmInterruptPin(_platform, tc, int_num)
+ const ArmPPIParams &p, ThreadContext *tc)
+ : ArmInterruptPin(p, tc)
{
}
diff --git a/src/dev/arm/base_gic.hh b/src/dev/arm/base_gic.hh
index 1d86550..4eef85b 100644
--- a/src/dev/arm/base_gic.hh
+++ b/src/dev/arm/base_gic.hh
@@ -47,6 +47,8 @@
#include "arch/arm/system.hh"
#include "dev/io_device.hh"
+#include "enums/ArmInterruptType.hh"
+
class Platform;
class RealView;
class ThreadContext;
@@ -177,8 +179,7 @@
{
friend class ArmInterruptPinGen;
protected:
- ArmInterruptPin(Platform *platform, ThreadContext *tc,
- uint32_t int_num);
+ ArmInterruptPin(const ArmInterruptPinParams &p, ThreadContext *tc);
public: /* Public interface */
/**
@@ -226,6 +227,9 @@
/** Interrupt number to generate */
const uint32_t intNum;
+ /** Interrupt triggering type */
+ const ArmInterruptType triggerType;
+
/** True if interrupt pin is active, false otherwise */
bool _active;
};
@@ -234,7 +238,7 @@
{
friend class ArmSPIGen;
private:
- ArmSPI(Platform *platform, uint32_t int_num);
+ ArmSPI(const ArmSPIParams &p);
public:
void raise() override;
@@ -245,7 +249,7 @@
{
friend class ArmPPIGen;
private:
- ArmPPI(Platform *platform, ThreadContext *tc, uint32_t int_num);
+ ArmPPI(const ArmPPIParams &p, ThreadContext *tc);
public:
void raise() override;
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I66ae3cfbc7b1ed94804f1f882c12eb31f70840da
Gerrit-Change-Number: 35395
Gerrit-PatchSet: 7
Gerrit-Owner: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: Andreas Sandberg <[email protected]>
Gerrit-Reviewer: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-MessageType: merged
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