Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/38387 )

Change subject: cpu: Track flat register indices in the Minor CPU with a vector.
......................................................................

cpu: Track flat register indices in the Minor CPU with a vector.

That avoids having to know the maximum number of dest registers there
can be in any instruction, and will likely not affect the performance of
the Minor CPU overall.

Change-Id: I4e49695ba06365d52eb4ce128d5cbb30db665bd7
---
M src/cpu/minor/decode.cc
M src/cpu/minor/dyn_inst.cc
M src/cpu/minor/dyn_inst.hh
M src/cpu/minor/fetch2.cc
4 files changed, 18 insertions(+), 16 deletions(-)



diff --git a/src/cpu/minor/decode.cc b/src/cpu/minor/decode.cc
index 2c90c8e..4084d1c 100644
--- a/src/cpu/minor/decode.cc
+++ b/src/cpu/minor/decode.cc
@@ -180,9 +180,9 @@
                         static_inst->fetchMicroop(
                                 decode_info.microopPC.microPC());

-                    output_inst = new MinorDynInst(inst->id);
+                    output_inst =
+                        new MinorDynInst(static_micro_inst, inst->id);
                     output_inst->pc = decode_info.microopPC;
-                    output_inst->staticInst = static_micro_inst;
                     output_inst->fault = NoFault;

                     /* Allow a predicted next address only on the last
diff --git a/src/cpu/minor/dyn_inst.cc b/src/cpu/minor/dyn_inst.cc
index 1b43fc8..ec5839c 100644
--- a/src/cpu/minor/dyn_inst.cc
+++ b/src/cpu/minor/dyn_inst.cc
@@ -79,7 +79,7 @@
 MinorDynInst::init()
 {
     if (!bubbleInst) {
-        bubbleInst = new MinorDynInst();
+        bubbleInst = new MinorDynInst(StaticInst::nullStaticInstPtr);
         assert(bubbleInst->isBubble());
         /* Make bubbleInst immortal */
         bubbleInst->incref();
diff --git a/src/cpu/minor/dyn_inst.hh b/src/cpu/minor/dyn_inst.hh
index b90e277..50828d9 100644
--- a/src/cpu/minor/dyn_inst.hh
+++ b/src/cpu/minor/dyn_inst.hh
@@ -160,7 +160,7 @@
     static MinorDynInstPtr bubbleInst;

   public:
-    StaticInstPtr staticInst;
+    const StaticInstPtr staticInst;

     InstId id;

@@ -227,17 +227,18 @@
     /** Flat register indices so that, when clearing the scoreboard, we
      *  have the same register indices as when the instruction was marked
      *  up */
-    RegId flatDestRegIdx[TheISA::MaxInstDestRegs];
+    std::vector<RegId> flatDestRegIdx;

   public:
-    MinorDynInst(InstId id_ = InstId(), Fault fault_ = NoFault) :
-        staticInst(NULL), id(id_), traceData(NULL),
+ MinorDynInst(StaticInstPtr si, InstId id_=InstId(), Fault fault_=NoFault) :
+        staticInst(si), id(id_), traceData(NULL),
         pc(TheISA::PCState(0)), fault(fault_),
         triedToPredict(false), predictedTaken(false),
         fuIndex(0), inLSQ(false), translationFault(NoFault),
         inStoreBuffer(false), canEarlyIssue(false), predicate(true),
memAccPredicate(true), instToWaitFor(0), extraCommitDelay(Cycles(0)),
-        extraCommitDelayExpr(NULL), minimumCommitCycle(Cycles(0))
+        extraCommitDelayExpr(NULL), minimumCommitCycle(Cycles(0)),
+        flatDestRegIdx(si ? si->numDestRegs() : 0)
     { }

   public:
diff --git a/src/cpu/minor/fetch2.cc b/src/cpu/minor/fetch2.cc
index 263a319..66a8c26 100644
--- a/src/cpu/minor/fetch2.cc
+++ b/src/cpu/minor/fetch2.cc
@@ -354,7 +354,8 @@

                 /* Make a new instruction and pick up the line, stream,
                  *  prediction, thread ids from the incoming line */
-                dyn_inst = new MinorDynInst(line_in->id);
+                dyn_inst = new MinorDynInst(
+                        StaticInst::nullStaticInstPtr, line_in->id);

                 /* Fetch and prediction sequence numbers originate here */
                 dyn_inst->id.fetchSeqNum = fetch_info.fetchSeqNum;
@@ -391,9 +392,15 @@
                  *  instructions longer than sizeof(MachInst) */

                 if (decoder->instReady()) {
+                    /* Note that the decoder can update the given PC.
+                     *  Remember not to assign it until *after* calling
+                     *  decode */
+                    StaticInstPtr decoded_inst =
+                        decoder->decode(fetch_info.pc);
+
                     /* Make a new instruction and pick up the line, stream,
                      *  prediction, thread ids from the incoming line */
-                    dyn_inst = new MinorDynInst(line_in->id);
+                    dyn_inst = new MinorDynInst(decoded_inst, line_in->id);

/* Fetch and prediction sequence numbers originate here */
                     dyn_inst->id.fetchSeqNum = fetch_info.fetchSeqNum;
@@ -402,12 +409,6 @@
                      *  has not been set */
                     assert(dyn_inst->id.execSeqNum == 0);

-                    /* Note that the decoder can update the given PC.
-                     *  Remember not to assign it until *after* calling
-                     *  decode */
- StaticInstPtr decoded_inst = decoder->decode(fetch_info.pc);
-                    dyn_inst->staticInst = decoded_inst;
-
                     dyn_inst->pc = fetch_info.pc;
                     DPRINTF(Fetch, "decoder inst %s\n", *dyn_inst);


--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I4e49695ba06365d52eb4ce128d5cbb30db665bd7
Gerrit-Change-Number: 38387
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
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