Peter Yuen has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/40600 )
Change subject: arch-riscv: Modifications to Riscv FS Configuration
......................................................................
arch-riscv: Modifications to Riscv FS Configuration
FSConfig is modified to connect necessary devices for
booting FS Linux. In future patches this will be organized
further. Devicetree generation feature might also be
added.
Change-Id: I94a07fc337f543f9a049ccac66689cfc50fdc8c8
---
M configs/common/FSConfig.py
M configs/example/fs.py
2 files changed, 54 insertions(+), 7 deletions(-)
diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py
index 6665225..597fcf2 100644
--- a/configs/common/FSConfig.py
+++ b/configs/common/FSConfig.py
@@ -1,5 +1,6 @@
# Copyright (c) 2010-2012, 2015-2019 ARM Limited
# Copyright (c) 2020 Barkhausen Institut
+# Copyright (c) 2021 Huawei International
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@@ -611,27 +612,72 @@
self.workload.command_line = fillInCmdline(mdesc, cmdline)
return self
-def makeBareMetalRiscvSystem(mem_mode, mdesc=None, cmdline=None):
+def makeLinuxRiscvSystem(mem_mode, mdesc=None, cmdline=None):
self = System()
if not mdesc:
# generic system
mdesc = SysConfig()
self.mem_mode = mem_mode
- self.mem_ranges = [AddrRange(mdesc.mem())]
+ self.mem_ranges = [AddrRange(start=0x80000000, size=mdesc.mem())]
self.workload = RiscvBareMetal()
self.iobus = IOXBar()
self.membus = MemBus()
+ self.system_port = self.membus.slave
+
+ self.intrctrl = IntrControl()
+
+ # HiFive platform
+ self.platform = HiFive()
+
+ # CLNT
+ self.platform.clint = Clint()
+ self.platform.clint.frequency = Frequency("100MHz")
+ self.platform.clint.pio = self.membus.master
+
+ # PLIC
+ self.platform.plic = Plic()
+ self.platform.clint.pio_addr = 0x2000000
+ self.platform.plic.pio_addr = 0xc000000
+ self.platform.plic.n_src = 11
+ self.platform.plic.pio = self.membus.master
+
+ # UART
+ self.uart = Uart8250(pio_addr=0x10000000)
+ self.terminal = Terminal()
+ self.platform.uart_int_id = 0xa
+ self.uart.pio = self.iobus.master
+
+ # VirtIOMMIO
+ image = CowDiskImage(child=RawDiskImage(read_only=True),
read_only=False)
+ image.child.image_file = mdesc.disks()[0]
+ self.platform.disk = MmioVirtIO(
+ vio=VirtIOBlock(image=image),
+ interrupt_id=0x8,
+ pio_size = 4096
+ )
+ self.platform.disk.pio_addr = 0x10008000
+ self.platform.disk.pio = self.iobus.master
+
+ # PMA
+ self.pma = PMA()
+ self.pma.uncacheable = [
+ AddrRange(0x10000000, 0x10000008),
+ AddrRange(0x10008000, 0x10009000),
+ AddrRange(0xc000000, 0xc210000),
+ AddrRange(0x2000000, 0x2010000)
+ ]
+
self.bridge = Bridge(delay='50ns')
self.bridge.master = self.iobus.slave
self.bridge.slave = self.membus.master
- # Sv39 has 56 bit physical addresses; use the upper 8 bit for the IO
space
- IO_address_space_base = 0x00FF000000000000
- self.bridge.ranges = [AddrRange(IO_address_space_base, Addr.max)]
+ self.bridge.ranges = [
+ AddrRange(0x10000000, 0x10000080),
+ AddrRange(0x10008000, 0x10009000)
+ ]
- self.system_port = self.membus.slave
return self
def makeDualRoot(full_system, testSystem, driveSystem, dumpfile):
diff --git a/configs/example/fs.py b/configs/example/fs.py
index f388503..f71912a 100644
--- a/configs/example/fs.py
+++ b/configs/example/fs.py
@@ -1,5 +1,6 @@
# Copyright (c) 2010-2013, 2016, 2019-2020 ARM Limited
# Copyright (c) 2020 Barkhausen Institut
+# Copyright (c) 2021 Huawei International
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
@@ -81,7 +82,7 @@
elif buildEnv['TARGET_ISA'] == "sparc":
test_sys = makeSparcSystem(test_mem_mode, bm[0], cmdline=cmdline)
elif buildEnv['TARGET_ISA'] == "riscv":
- test_sys = makeBareMetalRiscvSystem(test_mem_mode, bm[0],
+ test_sys = makeLinuxRiscvSystem(test_mem_mode, bm[0],
cmdline=cmdline)
elif buildEnv['TARGET_ISA'] == "x86":
test_sys = makeLinuxX86System(test_mem_mode, np, bm[0],
options.ruby,
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I94a07fc337f543f9a049ccac66689cfc50fdc8c8
Gerrit-Change-Number: 40600
Gerrit-PatchSet: 1
Gerrit-Owner: Peter Yuen <[email protected]>
Gerrit-MessageType: newchange
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