Sandipan Das has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/40907 )
Change subject: arch-power: Add doubleword divide instructions
......................................................................
arch-power: Add doubleword divide instructions
This adds the following instructions.
* Divide Doubleword (divd[o][.])
* Divide Doubleword Unsigned (divdu[o][.])
Change-Id: Id233a860fcb4b47c8397163a500c783f37be5dd4
Signed-off-by: Sandipan Das <[email protected]>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40907
Reviewed-by: Boris Shingarov <[email protected]>
Maintainer: Boris Shingarov <[email protected]>
Tested-by: kokoro <[email protected]>
---
M src/arch/power/isa/decoder.isa
1 file changed, 22 insertions(+), 0 deletions(-)
Approvals:
Boris Shingarov: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/power/isa/decoder.isa b/src/arch/power/isa/decoder.isa
index 258a696..2a9bfcd 100644
--- a/src/arch/power/isa/decoder.isa
+++ b/src/arch/power/isa/decoder.isa
@@ -610,6 +610,17 @@
}
}}, true);
+ 457: divdu({{
+ uint64_t src1 = Ra;
+ uint64_t src2 = Rb;
+ if (src2 != 0) {
+ Rt = src1 / src2;
+ } else {
+ Rt = 0;
+ setOV = true;
+ }
+ }}, true);
+
459: divwu({{
uint32_t src1 = Ra_uw;
uint32_t src2 = Rb_uw;
@@ -621,6 +632,17 @@
}
}}, true);
+ 489: divd({{
+ int64_t src1 = Ra_sd;
+ int64_t src2 = Rb_sd;
+ if ((src1 != INT64_MIN || src2 != -1) && src2 != 0) {
+ Rt = src1 / src2;
+ } else {
+ Rt = 0;
+ setOV = true;
+ }
+ }}, true);
+
491: divw({{
int32_t src1 = Ra_sw;
int32_t src2 = Rb_sw;
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Id233a860fcb4b47c8397163a500c783f37be5dd4
Gerrit-Change-Number: 40907
Gerrit-PatchSet: 8
Gerrit-Owner: Sandipan Das <[email protected]>
Gerrit-Reviewer: Boris Shingarov <[email protected]>
Gerrit-Reviewer: Jason Lowe-Power <[email protected]>
Gerrit-Reviewer: Sandipan Das <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-MessageType: merged
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