Sandipan Das has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/40926 )
Change subject: arch-power: Fix disassembly for shift instructions
......................................................................
arch-power: Fix disassembly for shift instructions
This fixes disassembly generated for integer shift
instructions based on the type of operand used for
the specifying the shift amount.
Change-Id: I4985334e6eaa9c09ce2d4e79b23e1ae7a9cd28c3
Signed-off-by: Sandipan Das <[email protected]>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40926
Reviewed-by: Boris Shingarov <[email protected]>
Maintainer: Boris Shingarov <[email protected]>
Tested-by: kokoro <[email protected]>
---
M src/arch/power/insts/integer.cc
1 file changed, 39 insertions(+), 4 deletions(-)
Approvals:
Boris Shingarov: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/power/insts/integer.cc
b/src/arch/power/insts/integer.cc
index 12ce7ee..2a3ab31 100644
--- a/src/arch/power/insts/integer.cc
+++ b/src/arch/power/insts/integer.cc
@@ -538,8 +538,22 @@
Addr pc, const loader::SymbolTable *symtab) const
{
std::stringstream ss;
+ bool printSecondSrc = true;
+ bool printShift = false;
- ccprintf(ss, "%-10s ", mnemonic);
+ // Generate the correct mnemonic
+ std::string myMnemonic(mnemonic);
+
+ // Special cases
+ if (myMnemonic == "srawi") {
+ printSecondSrc = false;
+ printShift = true;
+ }
+
+ // Additional characters depending on isa bits being set
+ if (rc)
+ myMnemonic = myMnemonic + ".";
+ ccprintf(ss, "%-10s ", myMnemonic);
// Print the first destination only
if (_numDestRegs > 0)
@@ -550,10 +564,31 @@
if (_numDestRegs > 0)
ss << ", ";
printReg(ss, srcRegIdx(0));
+
+ // Print the second source register
+ if (printSecondSrc) {
+
+ // If the instruction updates the CR, the destination register
+ // Ra is read and thus, it becomes the second source register
+ // due to its higher precedence over Rb. In this case, it must
+ // be skipped.
+ if (rc) {
+ if (_numSrcRegs > 2) {
+ ss << ", ";
+ printReg(ss, srcRegIdx(2));
+ }
+ } else {
+ if (_numSrcRegs > 1) {
+ ss << ", ";
+ printReg(ss, srcRegIdx(1));
+ }
+ }
+ }
}
- // Print the shift
- ss << ", " << sh;
+ // Print the shift value
+ if (printShift)
+ ss << ", " << (int) sh;
return ss.str();
}
@@ -579,7 +614,7 @@
}
// Print the shift, mask begin and mask end
- ss << ", " << sh << ", " << mb << ", " << me;
+ ss << ", " << (int) sh << ", " << mb << ", " << me;
return ss.str();
}
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I4985334e6eaa9c09ce2d4e79b23e1ae7a9cd28c3
Gerrit-Change-Number: 40926
Gerrit-PatchSet: 8
Gerrit-Owner: Sandipan Das <[email protected]>
Gerrit-Reviewer: Boris Shingarov <[email protected]>
Gerrit-Reviewer: Sandipan Das <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-MessageType: merged
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