[gem5-dev] Change in gem5/gem5[develop]: cpu-simple: Ignore writes to the "zero" register.

[Gabe Black (Gerrit) via gem5-dev]

Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/49709 )

Change subject: cpu-simple: Ignore writes to the "zero" register.
......................................................................

cpu-simple: Ignore writes to the "zero" register.

Rather than constantly overwriting the "zero" register to return its
value to zero, just ignore writes to it.

We assume here that the "zero" register is a standard RegVal type
register (ie not bigger than 64 bits) and is accessed as such.

Change-Id: I06029b78103019c668647569c6037ca64a4d9c76
---
M src/cpu/simple/base.cc
M src/cpu/simple_thread.hh
2 files changed, 6 insertions(+), 3 deletions(-)



diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 8854e9a..76ed9c5 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -304,9 +304,6 @@
     SimpleExecContext &t_info = *threadInfo[curThread];
     SimpleThread* thread = t_info.thread;

-    // maintain $r0 semantics
-    thread->setIntReg(zeroReg, 0);
-
     // resets predicates
     t_info.setPredicate(true);
     t_info.setMemAccPredicate(true);
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index e9c9ef3..678a489 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -472,6 +472,9 @@
         auto &reg_file = regFiles[reg.classValue()];
         const auto &reg_class = reg_file.regClass;

+        if (reg.index() == reg_class.zeroReg())
+            return;
+
         DPRINTFV(reg_class.debug(), "Setting %s register %s (%d)  
to %#x.\n",
                 reg.className(), reg_class.regName(arch_reg), idx, val);
         reg_file.reg(idx) = val;
@@ -485,6 +488,9 @@
         auto &reg_file = regFiles[reg.classValue()];
         const auto &reg_class = reg_file.regClass;

+        if (reg.index() == reg_class.zeroReg())
+            return;
+
         DPRINTFV(reg_class.debug(), "Setting %s register %d to %#x.\n",
                 reg.className(), idx, val);
         reg_file.reg(idx) = val;

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I06029b78103019c668647569c6037ca64a4d9c76
Gerrit-Change-Number: 49709
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <gabe.bl...@gmail.com>
Gerrit-MessageType: newchange
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