Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/49703 )

Change subject: cpu: Eliminate the (read|set)VecPredReg helpers from ThreadContext.
......................................................................

cpu: Eliminate the (read|set)VecPredReg helpers from ThreadContext.

Change-Id: I9f220ba4f28d6a63e4f037388b0431dfe123a8a9
---
M src/cpu/thread_context.cc
M src/cpu/thread_context.hh
2 files changed, 2 insertions(+), 21 deletions(-)



diff --git a/src/cpu/thread_context.cc b/src/cpu/thread_context.cc
index c8fffea..2e0ed61 100644
--- a/src/cpu/thread_context.cc
+++ b/src/cpu/thread_context.cc
@@ -231,7 +231,7 @@
     const size_t numPreds = regClasses.at(VecPredRegClass).size();
     std::vector<TheISA::VecPredRegContainer> vecPredRegs(numPreds);
     for (int i = 0; i < numPreds; ++i) {
-        vecPredRegs[i] = tc.readVecPredRegFlat(i);
+        tc.getRegFlat(RegId(VecPredRegClass, i), &vecPredRegs[i]);
     }
     SERIALIZE_CONTAINER(vecPredRegs);

@@ -278,7 +278,7 @@
     std::vector<TheISA::VecPredRegContainer> vecPredRegs(numPreds);
     UNSERIALIZE_CONTAINER(vecPredRegs);
     for (int i = 0; i < numPreds; ++i) {
-        tc.setVecPredRegFlat(i, vecPredRegs[i]);
+        tc.setRegFlat(RegId(VecPredRegClass, i), &vecPredRegs[i]);
     }

     const size_t numInts = regClasses.at(IntRegClass).size();
diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh
index 153a8e1..d8441bb 100644
--- a/src/cpu/thread_context.hh
+++ b/src/cpu/thread_context.hh
@@ -381,25 +381,6 @@
         setRegFlat(RegId(VecElemClass, idx), val);
     }

-    TheISA::VecPredRegContainer
-    readVecPredRegFlat(RegIndex idx) const
-    {
-        TheISA::VecPredRegContainer val;
-        getRegFlat(RegId(VecPredRegClass, idx), &val);
-        return val;
-    }
-    TheISA::VecPredRegContainer&
-    getWritableVecPredRegFlat(RegIndex idx)
-    {
-        return *(TheISA::VecPredRegContainer *)getWritableRegFlat(
-                RegId(VecPredRegClass, idx));
-    }
-    void
-    setVecPredRegFlat(RegIndex idx, const TheISA::VecPredRegContainer& val)
-    {
-        setRegFlat(RegId(VecPredRegClass, idx), &val);
-    }
-
     RegVal
     readCCRegFlat(RegIndex idx) const
     {

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/49703
To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings

Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I9f220ba4f28d6a63e4f037388b0431dfe123a8a9
Gerrit-Change-Number: 49703
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
_______________________________________________
gem5-dev mailing list -- [email protected]
To unsubscribe send an email to [email protected]
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

Reply via email to